John Ardizzoni is an application engineer with Analog Devices, Norwood, Mass. He received his BSEE from Merrimack College, North Andover, Mass. Email address: john.ardizzoni@analog.com
3 results found for John Ardizzoni, displaying items 1 - 3
October 2, 2008[Ideas For Design] Inexpensive High-Speed Amplifiers Can Create Flexible Clock Buffers
IN CONSUMER ELECTRONICS APPLICATIONS, which tend to be lower in frequency and less demanding than typical clock-buffering applications, inexpensive high-speed op amps (~100-MHz bandwidth) can offer an attractive option in place of traditional clock buffers. High-speed amplifiers can be less expensive than traditional clock buffers, yet they’re able to accommodate a wide range of design configurations. For instance, one good alternative for...
May 8, 2008[Design View / Design Solution] Designing For High Speed In Current-To-Voltage Conversion
Communications channels used to be a challenging exercise in pure analog design. Today, modulation occurs in the digital domain in many systems. But the transmitted signal is analog, so there’s always a conversion. For any communications system, choices for the digital- to-analog converter (DAC) and its current-to-voltageconverting op amp depend on the required bandwidth. As DACs and op amps get faster, they move closer to the transmitting...
June 21, 2007[Ideas For Design] Clamping Circuit Lowers Distortion, Improves Overdrive Recovery Time
Some amplifier applications require clamping or limiting due to large, sporadic signals appearing at the amplifier input. Clamping these errant signals protects the amplifier and other sensitive downstream circuitry. It also improves overdrive recovery time and can lower distortion. At the heart of the clamp circuit described here is the AD8099 high-speed, low-noise, externally compensated amplifier. The device consists of a single-stage amplifier followed by a unity-gain...
