John Pedicone
Write for Electronic Design
John Pedicone is a staff design consultant with Synopsys Consultant Services. He has led or contributed to the development of several SoCs in applications ranging from radar systems to satellite radio. He holds 12 U.S. Patents. Pedicone received a BA in psychology from the State University of New York at Albany and an MS in computer engineering from Rensselaer Polytechnic Institute.
Email address: jpedicon@synopsys.com
1 results found for John Pedicone, displaying items 1 - 1

 

October 25, 2007   [Design View / Design Solution]
Practical Ways To Estimate, Implement, And Verify SoC Decoupling Capacitance
Deep-submicron systems-on-a-chip (SoCs) require a power-grid voltage drop of much less than 10% of VDD. Decoupling capacitors, or decaps, help achieve this goal by minimizing switching noise. Determining the amount of decap required for an SoC involves many considerations, but the task needn't be a chore. The approach described in this article allows you to allocate decap accurately and with minimal area overhead for deep-submicron (DSM) SoCs. This...










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