Author - Min Jie Chong

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Min Jie Chong	Write for Electronic Design
Min Jie Chong, product manager for Agilent's oscilloscope division, is responsible for memory technology test solutions in the product manufacturing and business development sectors. He holds a BSEE from Multimedia University, Selangor, Malaysia. Email address: min-jie_chong@agilent.com
1 results found for Min Jie Chong, displaying items 1 - 1

August 28, 2008 [Design View / Design Solution]
Eye-Diagram Analysis Speeds DDR SDRAM Validation
Double-data-rate synchronous dynamic random access memory (DDR SDRAM) physical-layer testing is a crucial step in making sure devices comply with the JEDEC specification. The ultimate goal is to guarantee interoperability when different memory devices are used together and that they work when powered up. Fundamentally, interoperability begins at the physical layer. For a DDR memory interface, the responsibility of good physical-layer performance falls at...