Sudhakar Jill is the Marketing Director for Place-And-Route Products, Mentor Graphics, Wilsonville, Ore.
Over the past 15 years, he has held various application engineering, marketing, and management roles in the EDA industry. He has been previously responsible for the rollout of several market leading products and initiatives such as Pinnacle, Olympus-SoC, Design-for-Variability at Sierra Design Automation and Physical Compiler, Galaxy-SI at Synopsys. He holds a Bachelors degree in Electronics and Communications from University of Mysore, a Masters degree in Electrical Engineering from the University of Hawaii, and a MBA from the Leavey School of Business, Santa Clara University.
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November 24, 2008
[Design View / Design Solution] Low-Power Design With Multi-VDD Flows
Nearly all designs at advanced process nodes need some sort of power-saving strategy. As more designs employ advanced low-power techniques, design teams are discovering huge implementation hurdles that affect cost, performance, and time to market.
