Simon Napper, president and CEO of Synfora Inc., has more than 20 years of senior management experience in the ASIC and EDA industry. Before joining Synfora in 2003, he was CEO of InnoLogic Systems, having previously served as vice president of mMarketing for Aisys. Prior to Aisys, he was vice president of marketing for EPIC Design Technology, before which he was vice president of marketing for tools and advanced ASIC products at LSI Logic. He holds a BSEE degree from Brunel University in London, England. Email address: simon.napper@synfora.com Web site: http://www.synfora.com
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December 10, 2008
[POV: Point Of View] Use Algorithmic Synthesis To Solve Your FPGA Prototyping And Design Issues
Algorithmic synthesis—the efficient implementation of algorithms in silicon—offers compelling value to both system-on-a-chip (SoC) and FPGA design teams. However, there are subtle but important differences in the teams’ requirements when using algorithmic synthesis tools. This is especially true for FPGAs, which can be designed as just one in a series of steps to creating an SoC or as production-ready devices.
