Author - Reginald Conley

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Reginald Conley	Write for Electronic Design
Reginald Conley is director of applications at PLX Technology, Sunnyvale, Calif. He holds an MSEE and MBA from San Jose State University, Calif. Email address: rconley@plxtech.com Web site: http://www.plxtech.com
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May 19, 2009 [Design View / Design Solution]
PCI Express And The PHY(sical) Journey To Gen 3
This article will focus on some of the key physical-layer features and serial/deserializer (SERDES) decisions that make PCIe the success it’s become, then address the critical “curves ahead” designers will face with Gen 3. In addition, it details the pros and cons of some of the critical physical-layer tradeoffs necessary for designers journeying into the world of PCIe Gen 3.