Author - Mandel Yu

Technologies
- Analog
- Communications
- Components
- Digital ICs
- EDA
- Embedded
- Power
- Test
Design Hotspots
- Analog
- Embedded
- Power
- Green Design
Resources
Shows
- ESC 2009
- Embedded World 2009
- APEC
- CES
- electronica
- NI Week
- MTT-S
- DAC
- MD&M
- PCIM
Magazine
eBooks & Whitepapers
Jobs
More...
- eBooks
- Whitepapers
- Webcasts
- Job Zone
- Newsletters
- Blogs
- Hall of Fame
- RSS
- Subscribe

Click to view this week's ad screen

Mandel Yu	Write for Electronic Design
Madel Yu is a senior design engineer and technical lead in the development of PUF-based IP for ASICs and FPGAs. He holds a BSEE and MSEE from Stanford University, Calif., where he was a Mayfield Fellow. Email address: myu@verayo.com Web site: http://www.verayo.com
1 results found for Mandel Yu, displaying items 1 - 1

July 9, 2009 [Design View / Design Solution]
Turn FPGAs Into "Key" Players In The Cryptographics Field
Many state-of-the-art embedded systems use “platform” FPGAs such as Xilinx Virtex 4/5 class devices or Altera Stratix III/IV class devices. Until recently, it wasn’t possible to deploy keyed applications in these devices, where keys are unique to each device. Although these FPGAs do have bitstream decryption keys— whether battery-backed or fuse-based—that can be chosen by the user to be unique to each device, these keys can’t be accessed from an FPGA’s...