EDA Alert: February 6, 2007

By David Maliniak, February 06, 2007

While there have been some recent improvements in RTL verification technology, today's reality is that hardware-based approaches are needed to verify RTL against real-world system conditions. Lots of R&D is ongoing, but a solution is not expected any

Speeding to a Verification Solution

By John Gallagher, February 04, 2007

While there have been some recent improvements in RTL verification technology, today's reality is that hardware-based approaches are needed to verify RTL against real-world system conditions. Lots of R&D is ongoing, but a solution is not expected any

Carefully Weigh The Tradeoffs Of Cell-Based Vs. Structured ASICs

By Chris Tennant, October 13, 2005

With the emergence of 90-nm process technology, ASIC designers get to explore uncharted levels of performance and density. However, it has also unleashed a slew of challenging design-integrity issues, from crosstalk and noise to IR drop and timing closur

Designing With Structured Asics

By John Gallagher , April 01, 2004

Build Complex ASICs Without ASIC Design Expertise, Expensive Tools

By David Locke, March 01, 2004

Over the last decade, most OEM system designers used FPGAs to implement custom digital logic for system-level prototyping and qualification. Unable to meet production-cost targets with the FPGA, these same OEM designers turned to ASICs for...

Successful IC Design Takes Front- And Back-End Teamwork

By John Gallagher, April 01, 2002

Today, the success or failure of an advanced IC design depends largely on how smoothly it traverses the design process. Greater cohesiveness between front- and back-end design domains is critical to the productive development of advanced ICs in this...