;-----------------------------------------------------------------------------------
; Low-Cost 24-V Industrial Controller Is ESD-Protected
; Author:	Phill Leyva 
; 		Maxim Integrated Products   
; 		120 San Gabriel Drive   
; 		Sunnyvale, CA 94086 
;-----------------------------------------------------------------------------------
; File History:
; Rev		Date:		Description of Change:
; 1.0   	9/10/00 	Original Release
;-----------------------------------------------------------------------------------
;  Inputs 	8 each +24V to +5V DC ESD-Safe Debounced Inputs 
;
;  Outputs 	8 each +45V-rated Open Drain Outputs
;		250mA continuous 
; 		1.5A Pulsed Current per output 
;       
; ICs utilized in project:   
;	Motorola MC68HC705J1A Microcontroller
;	Maxim MAX6818 ESD-Protected CMOS Switch Debouncer
;	Maxim MAX1811 Voltage Monitor with Manual Reset 
;	Maxim MAX1615 High-Voltage, Low-Power Linear Regulator 
;	TI TPIC6273 Power Logic Octal D-Type Latch 
;-----------------------------------------------------------------------------------
; The Start section disables the timer and initializes the registers  
; and I/O. The program includes three subroutines:
;
; Input: (After power up, this subroutine obtains U2's current 
; input-port data and stores it in the Input Data Table (IN_Port).  
;
; Control: (The Control subroutine transfers the stored (IN_Port)   
; data to the Output Data Table (OUT_Port). A section in this 
; subroutine allows the user to enter the process-control algorithm.
;
; Output: (The Output subroutine transfers the new output data 
; (OUT_Port) to U3's output port.	
;
; An interrupt subroutine (IRQ_ISR) is called when a state change 
; occurs on U2's CH\ pin (CH\ latches low). The routine then updates 
; the Input Data Table (IN_Port) with new data for the Control 
; subroutine. The Main program controls the program flow, and 
; disables inputs when the Control and Output subroutines are called. 
; The Timer Interrupt (TIMER_ISR) and Software Interrupt 
; (SWI_ISR) subroutines are provided only for possible future use.
;-----------------------------------------------------------------------------------
; Register Equates
;-----------------------------------------------------------------------------------
PORTA 	equ	$00		; Port A byte address
PORTB	equ	$01 		; Port B byte address
DDRA	equ	$04		; Port A Data Direction Register
DDRB	equ	$05		; Port B Data Direction Register
TSCR	equ	$08		; Timer Status and Control Register
TCR		equ	$09		; Timer-Counter Register
ISCR		equ	$0A		; Interrupt Status and Control Register
PDRA	equ	$10		; Pull-Down Register Port A
PDRB	equ	$11		; Pull-Down Register Port B
EPROG	equ	$18		; EPROM Programming Control Reg.
COPR	equ	$7F0		; COP Reset Register
MOR		equ	$7F1		; Mask Option Register
;-----------------------------------------------------------------------------------
; I/O Port Register Equates
;-----------------------------------------------------------------------------------
; Port A Data Register ( PORTA Address = $00 )
PA0		equ	0		; Port A Data Bit 0
PA1		equ	1		; Port A Data Bit 1
PA2		equ	2		; Port A Data Bit 2
PA3		equ	3		; Port A Data Bit 3
PA4		equ	4		; Port A Data Bit 4
PA5		equ	5		; Port A Data Bit 5
PA6		equ	6		; Port A Data Bit 6
PA7		equ	7		; Port A Data Bit 7

; Port B Data Register ( PORTB Address = $01 )
EN\		equ	0		; Port B bit 0, Enable Bit
CLR\		equ	1		; Port B bit 1, Clear Bit
CLK		equ	2		; Port B bit 2, Clock Bit
PB3		equ	3		; Port B bit 3, not used
PB4		equ	4		; Port B bit 4, not used
PB5		equ	5		; Port B bit 5, not used

; Timer Status and Control Register (TSCR Address = $08)
RT0		equ	0		; Real-Time Interrupt Rate Select bit 0
RT1		equ	1		; Real-Time Interrupt Rate Select bit 1
RTIFR	equ	2		; Real-Time Interrupt Flag Reset
TOFR	equ	3		; Timer Overflow Flag Reset
RTIE		equ	4		; Real-Time Interrupt Enable
TOIE		equ	5		; Timer Overflow Interrupt Enable
RTIF		equ	6		; Real-Time Interrupt Flag
TOF		equ	7		; Timer Overflow Flag
;-----------------------------------------------------------------------------------
; Memory Equates
;-----------------------------------------------------------------------------------
RAM		equ	$00C0	; Start of on Chip Static RAM
EPROM	equ	$0300	; Start of on Chip ROM/EPROM
Vectors	equ	$07F8	; Start of Reset/Interrupt Vectors
Timer_INT	equ	$07F8	; Timer Vector
IRQ_INT	equ	$07FA	; External Hardware Interrupt Vector
SWI_INT	equ	$07FC	; Software Interrupt Vector
RESET	equ	$07FE	; Reset Vector

;-----------------------------------------------------------------------------------
; 	RAM Variables
;-----------------------------------------------------------------------------------
org		RAM		; Start of Static RAM address
IN_Port	rmb	1		; Byte Wide, Input Data Table
OUT_Port	rmb	1		; Byte Wide, Output Data Table
;-----------------------------------------------------------------------------------
; I/O Initialization
;	Default for PORTA = INPUT Port
;	Default for PORTB = OUTPUT Port
;	PortB Pins	5	4	3	2	1	0
;	Function	IN	IN	IN	CLK	CLR\	EN\
;-----------------------------------------------------------------------------------
org		EPROM
Start:		sei			; Mask Hardware Interrupt
clra			; Clear Accumulator
sta 	PORTA	; Blank data for registers
sta 	DDRA	; Set Port A Byte Wide Inputs
sta	IN_Port	; Clear Input Data Table
sta	OUT_Port	; Clear Output Data Table
lda	#$03		; Set up Port B Output Controls
; En\=H, CLR\=H, CLK=L
sta	PORTB	; Transfer data to Port B MCU-Latches
lda	#$07		;
sta	DDRB	; Set Port B for CLK, CLR\, EN\ Outputs
lda	#$0F		;
sta 	TSCR	; Disable Timer Interrupts
clrx 			; Clear Index Register
clra 			; Clear Accumulator
sta 	COPR 	; Reset Watchdog timer
		jsr	Input		; Get initial Input Port data
;-----------------------------------------------------------------------------------
; Main Program
;-----------------------------------------------------------------------------------
Main: 	sei			; Sets Interrupt Mask, Disable Hardware 						  
; Interrupt
 		Clra			; Clear Accumulator
 		Sta	COPR	; Reset Watchdog Get Input data and Send to Output
; 		------------------------------------------------ 
; USER to remove "nop"s and  insert CONTROL LOGIC routine here 
; 		------------------------------------------------ 
		nop 			;
 		nop			;
; 		------------------------------------------------ 
 		sta	OUT_Port 	; Update Output table
 		rts			; Return from Subroutine
;-----------------------------------------------------------------------------------
; Output Port Update Subroutine
;-----------------------------------------------------------------------------------
Output:	lda 	OUT_Port 	;
 		sta 	PORTA	; Set up new data for Output Ports
 		lda 	#$FF		; Set up PORTA as Output Port
 		sta 	DDRA	; Data on PORTA buss
 		lda	#$07		;
 		sta	PORTB	; Set Clk bit high
 		nop			; Kill time, let TPIC6273 read data
 		lda	#$03		;
 		sta	PORTB	; Set Clk bit low
 		lda	#$00		; Set up PORTA as Input Port
 		sta	DDRA	; Ready to read data 
 		rts			; Return from Subroutine
;-----------------------------------------------------------------------------------
; Initial Input Port Update Subroutine
;	Check Status of MAX6818 Debounced Input Data
;-----------------------------------------------------------------------------------
Input:		lda	#$02		;
 		sta	PORTB 	; Set Enable Low to Clear CH\ 
 		lda 	PORTA 	; Read Input Port data
 		sta 	IN_Port 	; Store in Input Data Table
 		da 	#$03 		;
 		sta 	PORTB 	; Set Enable High, ready for new data
 		rts 			; Return from Subroutine
;-----------------------------------------------------------------------------------
; Interrupt Service Routine
;	MAX6818 has new Debounced Input Data waiting
;-----------------------------------------------------------------------------------
IRQ_ISR:	lda 	#$02 		;
 		sta 	PORTB 	; Set Enable Low to Clear CH\ 
 		lda 	PORTA 	; Read new Input Port data
 		sta 	IN_Port 	; Update Data Table
 		lda 	#$03 		;
 		sta 	PORTB 	; Set Enable High, ready for new data
 		rti 			; Done with Interrupt Routine
;-----------------------------------------------------------------------------------
; Timer Interrupt Service Routine
;-----------------------------------------------------------------------------------
TIMER_ISR:
		nop 			; Future User Timer Routine
 		rti 			; Done with Interrupt Routine
;-----------------------------------------------------------------------------------
; Software Interrupt Service Routine
;-----------------------------------------------------------------------------------
SWI_ISR:
nop 			; Future User Sofware Routine
 		rti 			; Done with Interrupt Routine
;-----------------------------------------------------------------------------------
; RESET and Interrupt Vectors 
;-----------------------------------------------------------------------------------
 	org	Vectors

 	org 	Timer_INT
 		fdb 	TIMER_ISR
	org    IRQ_INT
 		fdb 	IRQ_ISR
	org 	SWI_INT
 		fdb 	SWI_ISR
	org 	RESET
 		fdb 	Start
;-----------------------------------------------------------------------------------
; MOR Vectors
;-----------------------------------------------------------------------------------
 	org 	MOR
 		db 	$21		; Set MOR Register Options
;-----------------------------------------------------------------------------------

IFD1620L