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Technology Shrinks PCB Motors While Boosting Accuracy
The march for miniaturization never stops as evidenced by portable products the size of a credit card that outperform some laptop and even desktop computers. Probably one of the most challenging markets in this quest for tinier gadgets is motors and motion control. Though still daunting, shrinking a semiconductor should be less of a burden because there are no moving parts to consider. But squeezing a motor and related control circuitry onto the head of a pin is...
Stripping Down Java
As expected, my article on “Embedded C Bashing” generated some discussion. So, I thought I better call in some experts to provide advice when it comes to safety and performance. The performance of compilers for languages like Java and C# has improved to where code generated for adding a pair of integers winds up being a single instruction. Features such as...
Smaller, Power-Packed Hi-Def Designs Rule This Year's ESC
It's tough to be optimistic these days. But based on some of the new products appearing at next week’s Embedded Systems Conference, it should be a good year for developers. The latest tools, chips, and platforms will roll out at the San Jose Convention Center, including Texas Instruments’ newest DaVinci microcontroller, which targets mobile hi-def presentation. A few companies showed us their releases early, though a few surprises will likely pop up at the...
It Looks Like HD Video Is Moving Into Smaller Quarters
High definition is all the rage on big-screen TVs. But now, smaller devices will be empowered with this crisp video content. Recent announcements should give designers a lift for creating small devices with big ideas for HD playback and recording. HD FOR $99 At the recent Mobile World Congress (MWC) in Barcelona, Nvidia introduced a platform based on its Tegra 600 series computer-on-a-chip. Reportedly, the platform will...
Improve Integrated SRAM Reliability With Hamming Error-Correction Code
Many error-correcting codes (ECCs) are proposed in the industry’s literature for correcting bit errors present in the received data. We will discuss Hamming codes that are used to correct singlebit errors and detect all double-bit errors that could occur during data transmission or residing in the memory. How much improvement we can get in the bit-errorrate (BER) performance curves using onebit error correction depends on the raw BER (RBER) without error...
Fujitsu Takes Digital Approach To Capacitive Touch Sensing
Capacitive touch systems typically operate using analog-to-digital converters (ADCs) to indirectly measure changes via voltage. Fujitsu’s FMA1127 touch sensor controller uses a more digital approach to detecting fingers, measuring the difference of the change of state of the RC portion of a pair of monostable, multivibrator flip-flops (see the figure). The chip uses a common counter/timer mechanism...
Mini-ITX Goes 12 V
The ITOX NP101-D16C Mini-ITX motherboard only requires a 12-V power source, making it ideal for automotive and industrial applications. It runs a 45-nm, 1.6-GHz Intel Atom N270 processor in conjunction with Intel’s 945GSE Express chipset and ICH7M I/O controller hub. Its total system thermal design power (TDP) is rated less than 15 W. This low-power motherboard’s 240-pin DDR2 DIMM socket can handle up to 2 Gbytes of DDR2 400- or 533-MHz memory. It...
Microcontroller Targets High-Speed Communications
Freescale’s 45-nm SOI-based MPC8569E multicore microcontroller incorporates intelligent peripherals to target high-speed communications applications such as gateways and wireless infrastructure. The chip’s primary core is the 1.3-GHz e500-based Power architecture core with a 512-kbyte L2 cache and double-precision floating-point support. This is complemented with four QUICC engine RISC processors that handle communication peripherals up to four Gigabit Ethernet ...
RTOS Handles AMP And SMP
Wind River’s VxWorks 6.7 real-time operating system (RTOS) addresses asymmetrical multiprocessing (AMP) in addition to symmetrical multiprocessing (SMP). A core reservation system allows AMP-style hardware allocation on conventional SMP architectures. Wind River’s multicore interprocess communication (MIPC) provides high-speed, zero-copy communication across SMP and AMP cores. Debugging support has been enhanced to address core-specific thread and processes in the...
Try Wireless Controls And E-Paper In Your Next Green Design
The standard way to wire a house is to figure out where to put the switches and then wire them to the outlets or lights. This requires extra wire to connect the switches to the plugs or devices and locks in the position of the switches. An alternative is to look at the problem from a wireless perspective using technologies like Zwave or ZigBee. In this case, the switch is simply a plate with a button. The wireless microcontroller can...
Low-Power SERDES FPGAs Save Power
Lattice Semiconductor’s LatticeECP3 FPGAs target the midrange sweet spot needing high-speed serializers/deserializers (SERDES). The 65-nm FPGAs deliver 3.2-Gbit/s SERDES with XAUI jitter compliance. The SERDES are grouped in blocks of four, but they can handle independent protocols including PCI Express, CPRI, OBSAI, XAUI, Serial RapidIO, and Gigabit Ethernet. The chips are designed for communication chores and include up to 7 Mbits of...
Rugged PC/104 System Targets Military Apps
Adlink Technology is looking to put more PC/104 boards into very rugged environments with its MilSystem 800. This STD-MIL-38999 version of the already rugged RuffSystem 800 is a conductioncooled enclosure that’s dustproof and splashproof with an operating temperature range of –40°C to 75°C. The motherboard holds a 1.4-GHz Pentium M with 1 Gbyte of double-data rate (DDR) memory plus a 32-Gbyte solid-state drive and a Compact- Flash...
Pointing Makes A Point In Consumer And Industrial Products
Apparently, the world isn’t satisfied with ordinary remote controls, game controllers, and even Nintendo’s Wii Remote. I say this because I saw pointing devices and controllers that break new ground at the 2009 International CES in Las Vegas last month. The most intriguing pointing device, I thought, was from a company called GestureTek (). CTO and cofounder Francis MacDougall demonstrated advanced gesture ...
Parallel Programming Is Here To Stay
It was easy to program applications in the days when one chip, one core were common. Single-chip solutions remain the target of many systems, especially for mobile applications. But these days, they’re likely to include more than one processing core. Programming these platforms can be a challenge. High-end server platforms like Intel’s six-core Xeon 7460 use lots of transistors for very large, complex architectures. Systems with even more cores on a single chip...
Embedded C Bashing
I love C. I started using it on DEC PDPs and Intel 8080s ages ago. It has long since replaced assembler and, along with C++, remains the programming language of choice in the embedded tool space according to most surveys. My recent article, “Parallel Processing Zooms While Debugging Zags” (www.electronicdesign.com, ED Online ...
See CES From Another Point Of View
I definitely should have started at the Sands when I was at the 2009 International Consumer Electronics Show (CES) last month. It would have given me a chance to have taken Anybot’s QA telepresence robot for a spin and save some shoe leather, since it could have roamed the aisles for me while I took in everything it encountered from the comfort of my own computer desk (Fig. 1). ...
Step Up To DDR3 Memory
With its 2007 release of the DDR3 SDRAM standard, JEDEC promised dramatic performance improvements at reduced power. The key to gaining those benefits lies in a complex physical-layer (PHY) interface that incorporates automatic calibration of both timing and impedances. By understanding the main features of the DDR3 interface, designers will be well positioned to make good use of the interface designâ??s intellectual property (IP) thatâ??s now...
Ethernet And PCI Express: A Match Made In...
Ethernet remains the network of choice, but now there are alternatives to running it on the backplane. PLX Technology looks to tunnel Ethernet via PCI Express (PCIe), allowing both protocols to run over a single PCI Express backplane. This should reduce the number of connections, cut down on power requirements, and simplify backplane switching. The tunneling approach isn’t a general specification yet, but it works with the Reduced Gigabit Media Independent...
FPGAs Move To 40 nm
New FPGAs from Altera and Xilinx have hit 40 nm and continue to push the performance envelope. The stratix Iv line from Altera comes in enhanced (E) and transceiver-based (GX) versions. the top end of the GX version supports 48 channels operating at speeds up to 8.5 Gbits/s. the chips incorporate four hard cores that support up to x8 PCI Express Gen 2 in addition to other standard interfaces such as serial RapidIo and Gigabit...
Make Security Your New Year's Resolution For 2009
The number of networked devices at this year’s International Consumer Electronics Show (CES) was mind-boggling. No area was spared. Automotive wireless connectivity ranged from the delivery of real-time traffic information to Internet access. Cars already feature a growing number of networks for everything from engine control to passenger entertainment. Many of these wired and wireless networks are isolated more often than they are tied together. This...
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