Electronic Design
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333 results found, displaying items 321 - 333

Power Reduction: Another Benefit of Signal Integrity
Signal transmission speeds are now entering the gigahertz range and understandably, considerable attention is now being paid to signal integrity. The primary objective of most research is to extract the dormant power of semiconductors...
ADSL+ Chips Slash Power Consumption With Class D Amps
Alex Lidow: Making The World Less Power-Hungry
Imagine you needed a glass of water and the only way to fill it up was from a fire hydrant with a big, clunky valve. Sure, you'd get that glass filled with water—but the street would be filled as well. "In the good old days,...
Hall of Fame: 2004 Honor Roll
Once again, Electronic Design is proud to salute the EE profession with our Engineering Hall Of Fame. Here, we present the Class Of 2004 inductees. After lifetimes of accomplishments and accolades, these engineers also have earned perhaps...
APEC 2004: Conference Wrap-up
There was plenty to interest attendees at APEC 2004, which was the 19th annual Applied Power Electronics Conference and Exposition. The show (see photo) featured hand-picked seminars, rap sessions, technical papers, an outstanding plenary session...
EDA Alert: June 2, 2003
Viewpoint -- Giving Designers The Power In Power Management by Ian Getreu, General Chair, 40th Design Automation Conference. Power management is becoming a major problem across the design spectrum due to the shrinking of device technology and the...
EDA Alert: March 17, 2003
Viewpoint -- SystemC, Anyone? by Joan Bartlett, President, Actis Design, Portland, Ore. The class library extension to C++, known as SystemC, is emerging as a viable solution to the various design dilemmas created by the move to SoC implementations...
EDA Alert: February 18, 2003
Viewpoint -- Is There Any Future For ASIC Emulators? (Or How FPGA-Based Prototypes Can Replace ASIC Emulators) by Lauro Rizzatti, Marketing Vice President, Emulation & Verification Engineering (EVE). 2002 was a tough year for the worldwide economy...
EDA Alert: December 16, 2002
Viewpoint -- The Future Of Electronic Design Is Low Power by James Lee, President, The ASIC Group. Even if you're not designing a battery-powered device, you may need to pay attention to power consumption. For line-powered devices, the power budget...
Li-Polymer: Practical, Or Just Promising?
Li-Ion Availability
Canning Thin Li-Ion Cells
Enhanced Varley Loop Locates Faults
Using the Varley-loop configuration to localize insulation faults in multipaired pulp-insulated cables has been practiced for quite some time. The standard configurations require precision potentiometers for manual nulling and calibration. However, modifying the Varley loop, and including a 3.5-digit digital panel meter chip (ICL 7106), eliminates the need for bridge balancing (...
Equalize Pad Power Dissipations
When an RF or microwave signal of excessively high power must be attenuated, one option is to use several cascaded pads. For example, an attenuation of 33 dB could come from a combination of 3 dB and 30 dB. But if the excessive power is really high, attention must be paid to the relative power dissipations of the two pads. In this case, the 3-dB pad would be put in first followed by the 30-dB pad, thus roughly equalizing the power dissipation burden placed on...
Dual VOUT DAC Takes Little Power
By using a combination of power-conserving tricks, a dual voltage-output DAC draws less than 20 æA from a 5-V supply (see the figure). The circuit suits a need for programmable voltage generation in slow or static applications, such as the nulling of offsets in a micropower instrument. Current-output DACs typically waste power by routing the complement of Iout to ground. In this setup, that waste is avoided by...




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