[Engineering Feature] Securing The Games
Security concerns remain high as the Summer Games open in Athens this month, with international threats as well as domestic ones: Greek terrorists set off three bombs in the city on May 5. Although the explosions caused no casualties,...
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Rob Brownstein
[Leapfrog: First Look] Ethernet Processor Cuts Networking Overhead
Ethernet is everywhere. It's easy to use and install, but the advent of 1-Gbit/s Ethernet is stressing even the latest gigahertz processors. So, it's hardware acceleration to the rescue. Heeding the call, Siliquent Technologies'...
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William Wong
[Leapfrog: First Look] FPGAs Bring Custom-ASIC Economy To System Design
Getting more for less is the eternal struggle of the semiconductor industry, especially with digital logic. That's why designers applaud the trend of FPGAs implemented in processes with ever-smaller feature sizes. Now, costs for many low- to...
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Dave Bursky
[Ideas For Design] Solid-State Relay Features Load Indicator
Several years ago, I designed a remote energy-control system that split a building into sections and wired the overhead space heaters into "zones." As space was an issue and OAC5s (optically isolated output modules) were way too big, each...
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Jay Miller
[POV: Point Of View] ZigBee And ECC Secure Wireless Networks
Not all wireless networking environments are created equal. An enterprise with mobile workers firing data back and forth, for example, has very different needs than a hospital outfitted with wireless patient-monitoring equipment. The standards...
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Roy Pereira
[Editorial] Broadband Over Powerline: Beyond The Interference
I wonder if any of you readers will march on Washington to protest FCC chairman Michael Powell's recent statements promoting the future of broadband over powerline (BPL). I know BPL is an incendiary issue with many of you, not because you're...
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Mark David
[Pease Porridge] What's All This Clinometer Stuff, Anyhow?
When I decided to go on a bicycle trek in Nepal a few years ago, I planned to instrument the tough hills with a clinometer to measure the slopes I'd be ascending and descending. Well, designing a "clinometer" shouldn't be Rocket Science. A weight...
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Bob Pease
[TechView: EDA] Collaboration Spawns A Structured-ASIC Flow
Structured ASICs are gaining market traction. Designers find that a migration path from FPGA to structured ASIC and, potentially, to standard-cell or custom ASIC is a good way to manage costs. Yet a unified flow that supports all options has been...
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David Maliniak
[TechView: EDA] EDA Roundup
Nearly 1000 I/Os are found on Hardi's latest FPGA-based ASIC prototyping board. The FPGAPRO_2x3 gives users access to multigigabit serial links and embedded PowerPC processors. The board also can be used as a standalone system for prototyping ASIC...
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David Maliniak
[Embedded in Electronic Design] MCUs Possess x86 Compatibility
A new rating system from advanced micro devices complements a recently unveiled line of the company's x86-compatible processors. The rating system is designed to replace the megahertz-related naming convention for its embedded processors. It...
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William Wong
[Embedded in Electronic Design] Accelerating XML 200-Fold
XML is the new lingua franca of the Internet, and it's finding homes in embedded applications as well. Text-based XML encoding isn't the most efficient because it requires analysis before processing. Tarari's RAX Content Processor...
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William Wong
[Embedded in Electronic Design] PCI Carrier Supports Quad FPGAs
The BenNuey-PCI-4E crafted by Nallatech features one Xilinx Virtex-II Pro FPGA and three DIME-II expansion slots. Each slot can handle an additional Virtex-II Pro. The DIME-II architecture is for high-speed links between FPGAs. The board supports...
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William Wong
[Embedded in Electronic Design] Fibre Channel Links Recorder
The MDR data recorder, which utilizes the PowerMIDAS 5000 I/O Controller, comes preconfigured to accept either Front Panel Data Port (FPDP) or Serial FPDP data streams. VMetro's recorder can handle multiple streams of data with an aggregate...
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William Wong
[Embedded in Electronic Design] Thanks For The Memory
The program runs! Break out the champagne. It's time to ship. Or is it? Diagnostic tools such as debuggers and trace applications are invaluable in tracking down bugs. However, an often overlooked or unavailable tool is the...
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William Wong
[Embedded in Electronic Design] Starter Kit Sets Sights On STR7 MCU
The ARM-based STR7 from STMicroelectronics gets a boost with the latest Hitex Tantino JTAG debugger. The Hitex Starter Kit for the STR7 MCU includes the HiTex evaluation board, a Tantino JTAG module, and a complete developer suite with debugger,...
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William Wong
[Embedded in Electronic Design] IDE Adds Peripheral Wizard
Taking advantage of built-in and external 8051 peripherals can be a chore given the wide range of MCU parts available. Hi-Tech Software's Hi-Tech C for 8051 version 9.01 tackles the problem with its peripheral wizard support to create header files...
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William Wong
[Embedded in Electronic Design] ETX SBC Packs 1.7-GHz Pentium M
The eTX-Lx15 ETX (Embedded Technology Extended form factor) module from Diversified Technology is designed for high-performance embedded applications requiring enhanced video support. This single-board computer (SBC) supports up to a 1.7-GHz Pentium...
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William Wong
[TechScope] Cell Phone Rings In With MMS Functionality
It seems that no one carries a mere phone anymore. The latest handhelds pack all kinds of multimedia features, and the Motorola A630 is no exception. When it's closed, it looks like an ordinary cell phone. But flip it open, and you'll find a...
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Richard Gawel
[TechScope] Epilepsy Patients Use Mind Control To Move A Computer Cursor
Much like a scene from some sci-fi flick, four epilepsy patients successfully learned how to control a cursor on a video screen using only their minds. This important development from researchers at Washington University at St. Louis could lead...
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Richard Gawel
[Quick Facts] Verifying The Entire System Sponsored by: VERISITY CORP.
Focus On Infrastructure Given the escalation in system complexities in today’s designs, an effective system-level verification strategy depends heavily on infrastructure, process, and methodology. HDL simulation technology has matured...
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Contributing Author