Create RS-485 Adapter To Convert Data Lines From Full- To Half-Duplex

June 21, 2007
Multiprotocol interface ICs can be used to connect a UART to an RS-485 bus architecture called point-to-point full-duplex (PTP-FD). The PTP connection usually requires drivers and receivers to be constantly enabled, and therefore "present" on the lin

Multiprotocol interface ICs can be used to connect a UART to an RS-485 bus architecture called point-to-point full-duplex (PTP-FD). The PTP connection usually requires drivers and receivers to be constantly enabled, and therefore "present" on the line. So when such a circuit board must fit into a point-to-multipoint, half-duplex system (PTM-HD), the entire board (usually) must be redesigned.

A simple trick, though, can adapt an existing PTP-FD board, which provides a single link between two terminals, for use in the more complex PTM-HD architecture. PTM-HD involves one master and multiple slaves, connected by multiple links. This adapter makes it possible to reuse the hardware already designed and manufactured.

A PTP-FD slave board is always ready to "hear" interrogation/command signals from the PTM-HD master unit, but it answers only when it recognizes its own address. To avoid any effect on the signal-transmission path of the half-duplex side, the adapter, which operates only on the slave board's Tx output, maintains itself in the quiescent state. Only when a slave output starts to transmit does the adapter become active and transfer that data to the central unit.

The adapter circuit consists of two devices (Fig. 1). The RS-485 receiver, IC1a, is always enabled. It senses the Tx output of the PTP slave board, drives the timer (IC2), and enables the RS-485 transmitter (IC1b), which is typically in a quiescent state. The triggering occurs when the slave board Tx output makes a high-to-low transition (a start bit). The timer's En DRV signal enables the transmitter, maintaining the En DRV state for a time interval determined by the delay capacitor.

The timer is retriggered by the next high-to-low transition (data bit) of the input signal (Fig. 2). The value of the delay capacitor depends on the Tx input transitions coming from the PTP slave board, the time between data packets, and the switching time between channels (the slave boards to be addressed).

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