This circuit design for a current-mode analog multiplier/ divider is based on current-controlled conveyors (CCCII) and a second-generation current conveyor (CCII). No passive components are used.
Analog multipliers and dividers are important building blocks in signal processing and are widely used in modulation systems. Also, for the same two inputs, the multiplier changes to a squaring circuit, which provides the energy content of the signal.
Current-mode signal-processing circuits are growing in popularity thanks to a number of advantages over conventional circuits, such as wider dynamic range, higher signal bandwidth, greater linearity, simpler circuitry, and lower power consumption.1 The multiplier/divider circuit described here is created using the active elements CCCII and CCII.
CCCII is a versatile current-mode active building block that offers such advantages as resistor-less operation and current tunability. Several filtering functions and oscillator circuits have been built with it.2,3 A dual-output CCCII is an active building block (Fig. 1) and is characterized by the equation:
It should be noted that the parasitic resistance at terminal x can be expressed as:
where “+” is for CCII+ and “–” is for CCII– . CCII+ can be created from commercially available current feedback amplifiers like the AD844 AN. We use the same IC for our design, but Prof. Raj Senani, head of the Department of Electronics and Communications, Netaji Subhas Institute of Technology, provides a CMOS implementation of a dual-output current conveyor.4 CCII enjoys the advantages of high signal bandwidth, greater linearity, larger dynamic range, simple circuitry, and lower power consumption.5
A new kind of analog multiplier/divider can be created by using two CCCII blocks and one CCII. The circuit doesn’t contain any passive elements (Fig. 4). Using Equation 1 and doing the routine circuit analysis, we get the output current as:
As Rx2 = VT/2Ib2 and Rx3 = VT/2Ib3, Equation 4 can be rewritten as:
Clearly from Equation 5, the output current is the multiplication of two currents Ib3 and IIN and the division of either Ib3 and Ib2 or IIN and Ib2. It should be noted that the multiplier is a two-quadrant current multiplier, since Ib3 can’t be negative.
The first CCII+ seems to be redundant at first in the proposed circuit in Figure 4, since the output Iz is also IIN. However, using the CCII provides the advantage of low input impedance, which is important in current-controlled current sources (CCCS).
Ideally speaking, the voltage at x terminal of the first CCII+ is zero and hence would help produce a better CCCS. In addition, the third DO-CCCII could well be replaced by a dual-output operational transconductance amplifier (DO-OTA), but the advantages of CCCII-based circuits over OTA-based circuits has already been explained in Reference 6.
To sum up, the advantages of this circuit are:
• Since no VT term is involved in the final result of Equation 4, the circuit is temperature-insensitive.
• Because no external passive components are used in realizing the circuit, it’s well suited for monolithic integration.
The design has been tested, but CCCII is currently not available as an IC. The CCCII shown in Figure 2 was built with the transistor model of PR100N (PNP) and NR100N (NPN)7 of the bipolar array ALA400 from AT&T and a dc supply of ±3 V. CCII+ can be constructed from commercially available ICs such as the AD844 from Analog Devices Inc. The circuit could be well simulated in Spice, too.
An alternate multiplier/divider can be created by modifying the proposed circuit here. This would involve using a CCII– instead of a CCII+; that is, the first block has to be changed. This causes the output currents from the third block (CCCII) to reverse direction (sign change). So, what was previously Io would get changed to –Io. Since the AD844AN can’t be directly used to create a CCII–, though, it seems that the first circuit as proposed in Figure 4 is more feasible. However, the DOCC block as proposed in Reference 4 could be used to implement the first block.
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The author would like to thank Prof. Raj Senani for his support and academic guidance.
REFERENCES:
1. M. siripruchyanun, “A Design of Analog Multiplier and Divider Using current controlled current Differencing Buffered Amplifiers,” Ieee International symposium on Integrated circuits (IsIc-2007), pp. 608-611.
2. Abhirup Lahiri, “current controlled oscillator with minimum components using dual-output current controlled conveyors,” Design Ideas, EDN, nov. 13, 2008, p. 62.
3. Abhirup Lahiri, “new current/voltage controlled sinusoid generator using dual-output current controlled conveyors,” Design Ideas, EDN, Jan. 22, 2008, pp. 54-56.
4. Raj senani, “new Universal current Mode Biquad employing All Grounded Passive components But Only Two DOccs,” Journal of Active and Passive Electronic Devices, Vol. 1, pp. 281-288, 2007.
5. U. Kumar, “current conveyors: A Review Of The state Of The Art,” IEEE Circuits and Systems Magazine, Vol. 3, pp.10-13, 1981.
6. A. fabre et al, “High frequency Applications Based on a new current controlled conveyor,” IEEE Trans.-Circuits and Systems-I: Fundamental Theory and Applications, vol. 43, no. 2, pp. 82-91, 1996.
7. D.R. frey, “Log-Domain filtering: an approach to current-mode filtering,” Ieee Proc G, 1993, 140, pp. 406-16.