1.5-Bit Stages In Pipeline ADCs

Code conversion and error correction in RSD pipeline converters is a more substantial area than the foregoing simple example might suggest, and one in which clear comprehensive literature is in short supply. Also, pipeline ADCs aren't typically-made up of only 1.5-bit stages. For example, a 10-bit converter might be a 3-bit flash first stage followed by five 1.5-bit stages ending in a 2-bit flash stage.

Though these descriptions have been in terms of single-ended circuitry for clarity, most pipelined ADCs with 1.5-bit stages are fully differential systems. Another important issue, not addressed here, is clocking and the synchronization of the data output circuitry.

To sum up, 1.5-bit stages in highspeed pipelined ADCs have become established as both performance and cost-effective circuit blocks. They're straightforward in concept, at least in terms of their basic operation.