The analog nature of our physical world and the growing need to process continuous functions in the digital domain place ever-stringent performance demands on today's analog-to-digital converters (ADCs). A converter's raw processing speed per se, however, isn't usually the weak link in the systemthough many designers find it difficult to get expected performance from a given device. Rather, it's the presence of noise.
The system designer's task, then, is achieving the ADC's advertised spec-sheet capabilities by addressing some signal and power issues in a practical way. These include minimizing the noise coming from power supplies or on its lines, establishing proper circuit biasing in the ADC, developing board layouts whose components and traces are resistant to unwanted coupling, and implementing sound grounding techniques. Overall, it's a better method than the "brute-force" technique of selecting ADCs with resolution that's higher than necessary.
Power considerations and associated issues are often the system designer's last thought, until noisewhich is often coupled into the ADC through the power-supply pinscreeps in. The debate between analog and digital circuitry also complicates matters. Indeed, the supply used for digital circuitry may be too noisy for analog or mixed-signal components such as ADCs, which usually have a poor high-frequency po-wer-supply rejection ratio (PSRR). Any way you look at it, however, getting the noise out of the system that powers the converter is critically important.
One key to improving ADC performance is maximizing its effective PSRR. A product's PSRR specification indicates the variation in a particular parameter for a given change in dc power-supply voltage.
For example, an ADC may specify the PSRR as the ratio of the change in full-scale gain or offset error with a given change in the dc supply voltage, usually expressed in dB. For many ADCs, the rejection ratio isn't all that good. If a change in supply voltage from 4.75 to 5.25 V (500 mV) results in a full-scale ADC gain error of 4 mV, the PSRR is:

The PSRR of the same converter will be much worse with an ac signal riding on the supply voltage. If analog and mixed-signal components are treated as though they have essentially a 0-dB PSRR, circuits will have better noise performance than they would if you relied upon the dc PSRR spec at higher frequencies. To minimize supply-noise problems, analog and digital supply pins should be separately decoupled with low-frequency and high-frequency bypass capacitors.
Typically, a parallel combination of 10- to 50-µF and 0.1-µF monolithic capacitors will suffice. The optimum capacitor values will vary somewhat with the particular ADC selected and the frequency of operation. Additionally, it's good practice to bring the power directly to the analog supply pins and supply the digital power pins through a choke. For high-speed ADCs, a ferrite core with 2.5 turns will do well. The choke usually only needs to isolate the power pins used for the output drivers (Fig. 1).
Careful consideration to the size and routing of board traces also pays dividends. A wide trace for routing analog power, for instance, will often result in lower power-supply noise than it would with an analog power plane. This is because the capacitance between the ground and power planes can couple noise into the analog power plane, especially if the plane is over or below the digital ground plane. A trace has much less capacitance than a plane, though. Use the shortest possible runs to ground for the bypass capacitors.
The type of supply also affects performance. Switching power supplies, including capacitive dc-dc converters, create excessive electrical noise on the supply lines and on ground. When it comes to ADCs, it's best to avoid them. If there is no alternative, observe the following guidelines:
- Locate the switcher circuit as far as possible, electrically and physically, from all analog circuitryespecially from high-impedance nodes and low-level signals.
- Keep the switching circuit small and compact.
- Keep all traces with switching currents and voltages as short as possible.
- Use a linear regulator, if possible, to supply the analog circuitry. Or filter the analog supplies very well, at least.
The analog input signal is measured with respect to the reference voltage. The digital output indicates the ratio of the analog input to the reference voltage at the moment of sampling. For instance, an ideal 10-bit ADC with a 2-V reference, sampling a 1.6-V signal, yields an output code of:

Any noise in the reference circuit will cause the instantaneous value of the reference voltage to change, altering the output code. In the above example, an instantaneous reference error of 50 mV changes the 2.00 V in the above equation to 2.05 V. The output code then becomes:

The error at any given instant is a function of the reference voltage error, the input voltage at the time of sampling, and the nominal reference voltage value. So, keeping the reference voltage quiet and stable cannot be overemphasized. Another source of noise comes from the ADC itself.
The reference ladder of high-speed converters has many internal switches (Fig. 2). As these switches open and close (usually at the ADC's clock rate), they inject charge into the ladder, adding noise to the system. ADCs with reference force and sense pins make it easy to force the reference ladder to a precise dc voltage by enclosing the ends of the ladder in the driving amplifiers' feedback loops. This eliminates errors due to voltage drops across the printed-circuit-board traces, device bond wires, and traces within the converter.