Dubbed BiCOM-III, TI's recently announced silicon-germanium (SiGe) complementary bipolar-CMOS manufacturing process integrates both NPN- and PNP-type bi-polar transistors. The result of this first-ever integration is speeds up to three times faster and 50% less noise than operational amplifiers and other high-performance mixed-signal products manufactured in complementary bipolar processes.
BiCom-III implements a combination of silicon on insulator (SOI); deep trench isolation; complementary SiGe bipolar, 5-V CMOS transistors; both polysilicon and precision thin-film resistors; and metal-insulator-metal capacitors. The SOI and trench isolation reduce individual device parasitic loading to the substrate and to adjacent devices. Eliminating the junction isolation enables much closer device spacing.
TI developed its high-speed process to include complementary NPN and PNP transistors, which also benefit from the high speeds of SiGe. The 0.4-mm emitter NPNs and PNPs are rated with a gain-linearity characteristic of 30,000 and 10,000 V, respectively. The tradeoff between low noise and low base resistance required special, thin base junctions.
As a result of TI's development breakthrough with SiGe PNPs, devices based on the BiCom-III process can operate much faster over wider ranges with greater precision (Fig. A). For the first time, it will be possible to develop analog components that operate at 100 MHz with a distortion level of −100 dB.
One nice feature of the process is that the CMOS contacts and base junctions are common, enabling the addition of 0.5-mm digital CMOS digital transistors into high-performance analog subsystems. These devices, along with precision resistors and capacitors, support a high degree of integration at the system level (Fig. B).
The trench isolation on SOI process reduces parasitics by one third. The collector-substrate and sidewall junction capacitances are close to zero. A low resistivity collector sinker and buried layer reduce the collector resistance to minimal levels.
For more information about the process, de-tails about it can be found on the Texas Instruments Web site at www.ti.com/sc/rd/sc02216.
Dubbed BiCOM-III, TI's recently announced silicon-germanium (SiGe) complementary bipolar-CMOS manufacturing process integrates both NPN- and PNP-type bi-polar transistors. The result of this first-ever integration is speeds up to three times faster and 50% less noise than operational amplifiers and other high-performance mixed-signal products manufactured in complementary bipolar processes.
BiCom-III implements a combination of silicon on insulator (SOI); deep trench isolation; complementary SiGe bipolar, 5-V CMOS transistors; both polysilicon and precision thin-film resistors; and metal-insulator-metal capacitors. The SOI and trench isolation reduce individual device parasitic loading to the substrate and to adjacent devices. Eliminating the junction isolation enables much closer device spacing.
TI developed its high-speed process to include complementary NPN and PNP transistors, which also benefit from the high speeds of SiGe. The 0.4-mm emitter NPNs and PNPs are rated with a gain-linearity characteristic of 30,000 and 10,000 V, respectively. The tradeoff between low noise and low base resistance required special, thin base junctions.
As a result of TI's development breakthrough with SiGe PNPs, devices based on the BiCom-III process can operate much faster over wider ranges with greater precision (Fig. A). For the first time, it will be possible to develop analog components that operate at 100 MHz with a distortion level of −100 dB.
One nice feature of the process is that the CMOS contacts and base junctions are common, enabling the addition of 0.5-mm digital CMOS digital transistors into high-performance analog subsystems. These devices, along with precision resistors and capacitors, support a high degree of integration at the system level (Fig. B).
The trench isolation on SOI process reduces parasitics by one third. The collector-substrate and sidewall junction capacitances are close to zero. A low resistivity collector sinker and buried layer reduce the collector resistance to minimal levels.
For more information about the process, de-tails about it can be found on the Texas Instruments Web site at www.ti.com/sc/rd/sc02216.