EDA Alert: October 20, 2003

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EDA Alert e-Newsletter
PlanetEE - www.planetee.com
Electronic Design - www.elecdesign.com *ALL NEW*
October 20, 2003

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Electronic Design ==> http://lists.planetee.com/cgi-bin3/DM/y/edFQ0DJhTw0BSK05Am0Ac

Today's Table of Contents:
1. Viewpoint Exclusive -- Why SystemVerilog?
2. Synopsys Delivers C API for Milkyway Database
3. Advanced Library Format Achieves IEEE Standardization
4. Programmable Analog Design Tool Perks Up Simulation
5. IC Package/PCB Design Flow Runs Under Linux
6. Happenings
- IEEE Conference on Computer-Aided Design (ICCAD)
- IP-Based SoC Design Workshop
- Ansoft Global Seminars

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1. Viewpoint -- Exclusive to EDA Alert
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Why SystemVerilog?

Tim Corcoran, Vice President of Training
Willamette HDL, Beaverton, Ore.

Even die-hard Verilog supporters must admit to the deficiencies of this
aging language, and to the disappointing pace of improvements over the
years. Help has arrived, though, in the form of SystemVerilog. It's fully
backward-compatible with existing code, yet incorporates a host of new
features by means of technology donations from Co-Design and now Synopsys
Inc., Verplex Systems (now Cadence), Intel, and others.

Already, most Verilog simulator vendors have at least beta support for
SystemVerilog v3.0 (published June 2002) that added new datatypes, arrays,
and structures, not to mention true transaction-level modeling via the
Interface construct. V3.1final was released in June 2003 and is currently
undergoing standardization. This version includes major enhancements for
verification, including classes, semaphores/mailboxes, random constraints,
program blocks, clocking domains, assertions, and a DirectC interface. The
latest specifications can be found on the Accellera website located at:

Accellera ==> http://lists.planetee.com/cgi-bin3/DM/y/edFQ0DJhTw0BSK0BDFk0A1

This language should provide something for everyone. Designers will
appreciate the new datatypes and structures, and the less ambiguous
register-transfer-level (RTL) coding style. Verification teams may benefit
the most, through object-oriented coding, assertion-based testing, random
constraints, and true transaction-level modeling. Management will welcome
the productivity benefits of a common language for design and verification.

Accellera took on the difficult task of marrying code and technology
donations from various sources in a host of languages, while attempting to
preserve the look and feel of traditional Verilog. Of course, the
simplicity of the Verilog language has also been its undoing.
SystemVerilog provides rich features to be expected in a 21st-century
language at the cost of a steep learning curve for anyone with no
programming skills outside Verilog-1995. Training will be an important
part of SystemVerilog integration.

Unlike past Verilog enhancements that took forever to reach the user,
SystemVerilog is here today in a very usable form, and the best is yet to
come.

Tim Corcoran is vice president at Willamette HDL Inc. and author of its
training course, "SystemVerilog for Verilog Users."

Contact Tim Corcoran at: mailto:tim@whdl.com

To comment on this Viewpoint, go to Reader Comments at the foot of the
Web page:

Electronic Design ==>
http://lists.planetee.com/cgi-bin3/DM/y/edFQ0DJhTw0BSK0BDDd0Ar

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2. News
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Synopsys Delivers C-API for Milkyway Database

Synopsys Inc. has opened its Milkyway design database C-application
programming interface (C-API) to EDA vendors. The Milkyway C-API gives tool
vendors the ability to deliver their products pre-integrated with Synopsys'
Galaxy Design Platform. Integration using the Milkyway C-API offers design
engineers lower design risk, improved EDA tool interoperability, and more
effective design flows.

The Milkyway C-API comprises the function prototypes and linkable libraries
that allow a standalone program to read and write data in the Milkyway
database. The Milkyway C-API has been available to customers for several
years. Now, both customers and EDA tool developers can use the Milkyway
C-API to directly access Milkyway design data with their application
programs instead of working through less efficient file-transfer formats.
The Milkyway C-API provides an additional mechanism for customers and EDA
vendors to integrate with, as well as enhance, the Galaxy Design Platform.
The Milkyway database is the basis for Synopsys' Galaxy Design Platform.

The Milkyway C-API linkable libraries, available now, are free to
registered Milkyway Access Program (MAP-in) members. MAP-in members can
download the Milkyway C-API through the MAP-in website at:
Synopsys/mapin ==> http://lists.planetee.com/cgi-bin3/DM/y/edFQ0DJhTw0BSK07bd0A3

Any EDA vendor can become a MAP-in member by registering at:
Synopsys/mapin/registration ==> http://lists.planetee.com/cgi-bin3/DM/y/edFQ0DJhTw0BSK0BDDj0Ax

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3. News
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Advanced Library Format Achieves IEEE Standardization

Accellera's Advanced Library Format (ALF) has been approved as IEEE
1603-2003. In addition, the VHDL and Verilog RTL synthesis standards passed
balloting and are now IEEE 1076.6-1999 and IEEE 1364.1-2002, respectively.
Also, IEEE 1076-2002 (VHDL) adds new features.

These IEEE standards improve nanometer design library descriptions and
tools, Verilog and VHDL, and synthesis.

IEEE 1603 standardizes the language and semantic representation for design
libraries. It supports an RTL-to-GDSII description of functional,
electrical performance, and layout views for technology libraries, scalable
from cells to complex hierarchical design blocks.

The IEEE 1076.6 and 1364.1 (Verilog and VHDL RTL) synthesis standards
define the syntax and semantics that can be used by all compliant RTL
synthesis tools to achieve uniformity and interoperability.

IEEE 1076 (VHDL) and IEEE 1364 (Verilog) documentation is available by
calling 1 (800) 678-IEEE or at:

IEEE.org ==> http://lists.planetee.com/cgi-bin3/DM/y/edFQ0DJhTw0BSK08CR0AG

A draft of the ALF (IEEE 1603) documentation is available at:

IEEE.org/alf ==> http://lists.planetee.com/cgi-bin3/DM/y/edFQ0DJhTw0BSK0BDDf0At

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4. News
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Programmable Analog Design Tool Perks Up Simulation

New features in Anadigm's programmable analog design software add a higher
level of realism to simulations of field-programmable analog arrays
(FPAAs). On top of that, they provide further safeguards to ensure that
designs made in AnadigmDesigner2 will seamlessly translate into working
analog circuits. Featuring full support for the new entry-level AN221E02
FPAA, AnadigmDesigner2 v2.4 also gives users the ability to add
voltage-controlled variable gain stages, low-corner frequency bilinear
low-pass filters, sum/difference integrators, and square-root functions to
their analog circuit designs simply by dragging and dropping Configurable
Analog Modules (CAMs).

Extensive improvements in AnadigmDesigner2 v2.4 support post-simulation
probing of circuits designed in FPAAs, including an enhanced oscilloscope
feature that provides a real-time trace display during simulations.

A free trial copy of AnadigmDesigner2 v2.4 is available for download. A
complete evaluation kit with a development board, entry-level software, and
updated documentation is now available at a promotional price of $199.
Pricing for FPAA silicon starts at $4.95 in 1000-piece quantities.

Anadigm ==> http://lists.planetee.com/cgi-bin3/DM/y/edFQ0DJhTw0BSK0BBSB0AW

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5. News
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IC Package/PCB Design Flow Runs Under Linux

Cadence Design Systems is offering the industry's first complete
front-to-back advanced IC package and printed-circuit-board (PCB) design
flow to run on Linux as part of its version 15.1 IC packaging and PCB
design environment release. The Cadence 15.1 software release will deliver
an entire Cadence IC packaging and PCB design environment on the Linux OS,
providing customers with more options as they determine their optimal EDA
IT environment.

The entire Cadence 15.1 IC packaging and PCB design environment release,
including the PCB Design Studio and Design Expert product lines, will be
available worldwide in late Q4 2003, and will support Linux, Windows XP
Pro, Windows 2000, HP-UX, IBM AIX, and Sun Solaris platforms. A one-year
license for PCB Design Studio costs $3600, and a one-year license for PCB
Design Expert goes for $25,200. Customers with current maintenance
agreements will be able to move to the 15.1 release and take advantage of
this new Linux support at no additional cost.

Cadence Design Systems ==>
http://lists.planetee.com/cgi-bin3/DM/y/edFQ0DJhTw0BSK0BDDg0Au

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6. Happenings
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IEEE Conference on Computer-Aided Design (ICCAD)
Doubletree Hotel, San Jose, Calif.
November 9-13, 2003
ICCAD ==> http://lists.planetee.com/cgi-bin3/DM/y/edFQ0DJhTw0BSK05As0Ai

IP-Based SoC Design Workshop
Espace Congres du World Trade Center, Grenoble, France
November 13-14, 2003
us.design-reuse.com ==>
http://lists.planetee.com/cgi-bin3/DM/y/edFQ0DJhTw0BSK0BALZ0Am

Ansoft Global Seminars
Cities around the world
October and November, 2003
Ansoft ==> http://lists.planetee.com/cgi-bin3/DM/y/edFQ0DJhTw0BSK0BDDh0Av

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EDA ALERT e-NEWSLETTER CONTACTS

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EDA Technology Editor, Electronic Design: David Maliniak
mailto:dmaliniak@penton.com

Advertising/Sponsorship Opportunities: Bill Baumann
mailto:bbaumann@penton.com

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