Suppose you want to buy an analog-to-digital converter (ADC). You tell the clerk that you would like a 16-bit ADC with a 100-ksample/s rate and a 1.024-V input range. The clerk will reply, “Yes sir! And how much noise would you like with that order?” Your response is “None! I don’t want any noise.”
Well, that’s not going to be possible. You will always get some noise. Think of it like rat hair in hot dogs. No one wants any, you can’t remove all of it, but the manufacturer will guarantee at least a maximum level. Here are some simple definitions:
- Signal is the stuff you what.
- Noise is the stuff you don’t want.
- What you get is a combination of what you wanted and what you didn’t what. Subtract what you wanted from want you got and you have your noise.
- The goal is to make the ratio of what you wanted to what you didn’t want as high as possible.
By these definitions, ADC quantization is noise. Figure 1 shows part of an ideal converter. The analog input is a straight line while the digital output is a series of steps, each 1 LSB high. You wanted a straight line, and you got a series of steps. Subtract the two and you have the noise.
Noise is shown as triangular waveform. Its amplitude is bound to plus or minus half the quantization level (±0.5q). Also, noise averages to zero and has an RMS value proportional to the quantization level (q/√12).
The signal-to-noise ratio (SNR) for an ADC is defined as the ratio, in dB, of the largest possible sinusoidal input versus the amount of noise. Both should be measured in RMS. For an ideal n-bit ADC, the theoretical SNR is:
SNRIDEAL = 6 × n + 2
For instance, a 16-bit ADC has an ideal SNR of 6 × 16 + 2 or 98 dB. Of course, the actual SNR cannot be any larger than this and is most likely smaller. This is because the ADC supplies other noise from sources such as noisy silicon or interference from internal control signals.
Examination of the noise will not show what errors contribute to the total output noise. This is okay for rat hair, because it doesn’t really matter if it came from the spices, cereal filler, or mystery hot dog meat. Assume all the noise is quantization error, and you get a value for the effective number of bits (ENOB):
SNRIDEAL = 6 × ENOB + 2
You now have an equation tying SNR and actual ADC resolution. Suppose a 16-bit ADC has 89-dB SNR with a 1.024-V input range. Working this equation backward results in a calculated ENOB of 14.5 bits.
Note: when you bring up the 6 × n +2 thing at some meeting, there may be a grandstanding engineer who will smugly state that the equation is actually 6.02 × n + 1.76 and generally act superior for remembering an extra couple of digits. When this happens, just say that it is actually 6.0206 × n + 1.7609, but 6 × n + 2 is a good approximation, accurate within a tenth of a dB from 8 to 16 bits. This will knock the smug look off his face.
With an input range of 1.024 V, the largest sinusoidal input will be 362 mVRMS. This works out to a calculated noise of 12.8 µV. So for this ADC, you get 14.5 effective bits from a noise contribution of 12.8 µV. Add your own 12.8 µV of noise, and you’re down to 14 bits.