Multichannel Audio, DDS Keep DACs Humming

JITTER
In terms of clocking, 1 ps of rms jitter in an integrated solution used to be quite a challenging barrier for designers to leap. That has changed. In fact, the 300-fs barrier fell in 2005. Currently, it looks like 100 fs will be surpassed in 2006.

Can jitter really be squeezed to 100 fs? It can, and the technique reveals something about system designers' real concerns with respect to jitter. It all comes down to phase noise.

For most RF applications, phase noise is the critical spec, not jitter per se. But in applications such as medical imaging, jitter is the key spec. So, it's necessary to be able to report characteristics in both the time and frequency domains.

ISSCC
Scheduled for Feb. 4-8 in San Francisco, this year's International Solid State Circuits Conference (ISSCC) has only three papers dealing with DACs. For example, Arizona State's Connection One Research Center offers "A Bandpass ΣΔ RF-DAC with Embedded FIR Reconstruction Filter."

It describes a single-bit, bandpass, delta-sigma DAC followed by a currentsteering finite-impulse response reconstruction filter with an embedded upconversion mixer. The DAC targets lowpower, software-definable, digital-IF transmitter ICs. The authors say that phase-aligning LO nulls to IF clock transitions minimize signal-dependent glitches at the IF output.

See Associated Figure