The thing about selecting the
â??bestâ? in mixed-signal
chips lies in answering a key
questionâ??best for what?
Designers can calculate the
analog-to-digital converter
(ADC) figure of merit (FOM), based on
power consumption, effective number
of bits (ENOB), and sampling frequency.
But interpreting an expression for
pJ/conversion doesnâ??t really say anything
about an ADCâ??s appropriateness
for an actual application.
THE HIGH
Letâ??s start with the dazzlers,
those super-fast chips with wide
dynamic range intended to move digital
downconversion as far up the receiver
signal chain as possible.
Last summer, National Semiconductor
announced 170- and 155-Msample/s
ADCs for wireless infrastructure. There
were two 12-bit chips: the CMOS-output
ADC12C170 and the LVDS-output
(low-voltage differential signaling)
ADC12V170. Also announced was the
14-bit ADC14V155, which runs at
155 Msamples/s.
Key specs at a 70-MHz input for the
12-bit ADCs include 85.4-dB spuriousfree
dynamic range (SFDR) and 67.2-dB
signal-to-noise ratio (SNR) for the one
with CMOS output and 85.8-dB SFDR
and 67.2-dB SNR for the one with
LVDS output. The 14-bit chip boasts
85-dB SFDR and 69.5-dB SNR.
During the same timeframe, MIT-spinoff
Kenet Inc. introduced the 12-bit,
500-Msample/s KAD5512-50 and the
14-bit, 250-Msample/s KAD5514-25.
At Nyquist, the former boasts 70-dB
SFDR and 66.3-dB SNR.
Meanwhile, Texas Instruments
announced a 14-bit, 400-Msample/s
ADC with an integrated front-end
buffer, the ADS5474. Itâ??s a higher-resolution
complement to an already
announced 12-bit, 500-Msample/s part.
TI emphasizes the converterâ??s 70-dBFS
SNR through first Nyquist and 69-dBFS
SNR through second Nyquist.
In mid-2007, Maxim Integrated
Products came out with the
silicon-germanium (SiGe),
8-bit, 2.2-Gsample/s MAX109
with integrated track-andhold.
At maximum sample
rate and a 300-MHz input frequency,
the ADC achieves 62-dBc SFDR and
45-dB SNR. That SNR remains flat
(within 1.6 dB) for input frequencies
up to 2 GHz.
Last December, Analog Devices
offered its candidate for the best, the
dual 14-bit, 150-Msample/s AD9640,
which provides a 70-MHz input 85-dBc
SFDR and 72.7-dBFS SNR. One unique
feature is that the ADC divides down its
input clock internally. Usually, such
ADCs require the division to take place
off-chip. It also integrates an automatic
gain control (AGC) block.
That lineup from 2007 ignores a
line of 8-bit, 1.5-Gsample/s ADCs
that National introduced in 2006.
That product family includes an
interleaved dual-device package that
kicks the effective sampling rate up to
3 Gsamples/s.
Looking at these announcements, we
see there are tradeoffs between resolution
and speed that make it hard to pick
the â??bestâ? chip. Cost and power consumption
arenâ??t even included in the
brief comparison above.
THE MIGHTY
Moving down the
ADC input frequency spectrum, Austria
Microsystems introduced 10- and
12-bit, 150-ksample/s ADCs for battery-
powered data-acquisition systems
in 2007.
The 10-bit AS1528 and AS1529 are
specâ??d at ±0.275-LSB (max) integral and
differential nonlinearity and ±25-LSB
gain error and â??79.5-dB total harmonic
distortion (THD) while drawing 350 μA
(at 3 V) at the full sampling rate, 245 µA
at 100 ksamples/s, 2.5 μA at ksamples/s,
and 200 nA during shutdown. The
AS1528 has differential input, and the
AS1529 is single-ended.
For professional audio recording,
TI introduced the PCM4220 and
PCM4222, a pair of 24-bit, 216-kHz
ADCs. They deliver up to 124-dB
SNR and integrate an on-chip, linear
phase decimation filtering engine that
supports either classic or low groupdelay
filter responses, so designers
can optimize the device for studio or
live sound. â??Low powerâ? in this case
means 305 mW at 48 kHz, but thatâ??s
still low enough to allow an audio
interface over USB or FireWire.
In applications such as portable medical
devices, conversion rates go even
lower. To serve the needs of that area,
Linear Technology came up with what
must constitute the smallest-footprint (2
by 2 mm) and potentially the slowest
ADC of the year, the 16-bit, 30-Hz
LTC2450 (see the figure).
Its specs include 2-LSB integral nonlinearity
(INL), 1.4-μVRMS noise, and
0.01% gain error. With a 2.7- to 5.5-V
supply, the LTC2450 draws 500 μA
when itâ??s operating and down to less
than 1 μA in shutdown. By controlling
the duration between conversions,
power dissipation can be reduced to 50
μW at a 1 Hz. For some applications,
slowest is best.