A careful evaluation of process technology
options is imperative to meet
the insatiable demand for speed, features,
and lower cost in data transmission and
telecommunications ICs. High switching
speeds, low noise and power consumption,
and dense passive devices are critical needs
for high-speed ICs used for physical-layer
(PHY) applications. These include laser
drivers and phase-locked loops (PLLs) for
the transmitter and transimpedance amplifiers
(TIAs) and limiting amplifiers on the
receiver side.
Over the last decade, silicon-germanium
(SiGe) biCMOS technologies have steadily
displaced compound semiconductor
(indium phosphide, or InP) offerings for
data-communications ICs with bit rates up to 10 Gbits/s. By carefully
engineering the strain (and thus the bandgap), enhanced electron
mobility leads to higher switching speeds. A key device level
figure-of-merit is the cutoff frequency (fT), which is the frequency
at which an active device’s gain reduces to unity and is a measure
of the device’s switching speed.
A second figure-of-merit often used to benchmark communications
IC devices is fMAX, a benchmark for analog applications and
the frequency at which the power gain reduces to unity. The fT/fMAX
of SiGe NPN typically ranges from 30 GHz for high-breakdownvoltage
devices to 300 GHz for low-breakdown-voltage devices.
The speed-breakdown tradeoff is frequently exploited in modular
SiGe biCMOS foundry offerings by modulating the local collector
doping, allowing higher functional integration (Fig. 1).
A rule of thumb is to multiply the bit rate by 4 to estimate the
minimum fT/fMAX needed. An fT/fMAX of 40 GHz is generally sufficient
for 10 Gbits/s, while an fT approaching 160 GHz is needed
for 40-Gbit/s applications. Though InP devices have superior speed
and noise characteristics, SiGe biCMOS offerings can leverage
economies of scale of silicon fabs, while providing significantly
higher levels of integration needed for
feature-rich ICs.
Integration is especially important
when large capacitors or resistors
are needed (e.g., for TIAs), or when
there’s significant digital content in
the IC. SiGe biCMOS will continue
to compete with compound semiconductor
technologies for 40-Gbit/s
telecommunication and 100-Gbit/s
data-communication applications,
while compound semiconductorbased
offerings are likely to be the
technology of choice for 160-Gbit/s
telecommunication IC needs.
A recent trend is the emergence of 65-nm
RF CMOS for 10- to 40-Gbit/s communication
ICs. With FET fT/fMAX approaching
200 GHz and low noise figures, and the
capability to add dense digital content
for system-on-a-chip (SoC) needs, these
scaled silicon platforms on 300-mm wafers
are an attractive option. The RF CMOS
option may be a more viable option on the
receiver-side ICs, since the lower supply
voltage limits usage in high-power laser
driver circuits.
In the near term, however, die-cost
optimization and the desirability to use
best-of-breed technologies will continue to
drive optical communication subsystems
to different process technologies. Systemsin-
a-package (SIPs) will remain an attractive option for IC vendors
looking to offer integrated solutions to equipment manufacturers.
SiGe biCMOS, with its low noise and higher voltage-handling
capabilities, though, remains an attractive option for complete
integration of the receive and transmit functions on a single chip.
Figure 2 shows the typical usage of various process technologies for
lightwave communication ICs.
An often overlooked consideration while evaluating process
technology platforms for high-speed communication needs relates
to design automation. With a goal of reducing time-to-market and
prototyping costs, best-in-class design automation tools are imperative.
Design-enablement tools, including silicon-verified device
models and flexible design environments, allow customers to test,
modify, and improve the functionality and yield of new products on
the computer long before the first prototype is manufactured.