Makers of wireless infrastructure equipment and cellular handsets are constantly pressured to beef up performance while cutting the size and cost of their systems. The emerging third generation (3G) of mobile communications applications is only adding to the stress. It's not surprising that designers of such equipment are always exploring newer techniques and low-cost alternatives. This is especially so in the RF power arena, a critical communication-system function that enables the signal to reach all the nooks and crannies in a communications cell.
In the 900-MHz to 2.4-GHz spectrum, power-amplifier designers are tapping recent advances in silicon-based lateral-diffused MOS (LDMOS) power transistors to create new solutions as viable alternatives to bipolar junction transistors (BJTs), gallium-arsenide (GaAs) FETs, and other heterojunction structures. LDMOS power transistors have improved in efficiency, linearity, peak-power capability, and cost-per-watt performance, as well as matched input/output impedances for easy implementation.
Unlike others that require mixed voltages, these power transistors offer the benefit of using a single 28-V supply. In reality, the silicon-derived LDMOS structure has been refurbished to vie with existing power-amplifier solutions employed in wireless infrastructure applications. Similar movement also is underway in the low-voltage sector for cellular handsets.
Though LDMOS technology has progressed substantially in the last few years, its efficiency is still trailing behind GaAs transistors at higher frequencies and higher power levels. Moreover, bias-current drift continues to haunt the technology.
As LDMOS transistors push bipolar transistors out of wireless infrastructure sockets, they're poised to compete head-on with GaAs solutions in the 2.0- to 2.4-GHz spectrum. Efforts are in progress worldwide to boost the efficiency of the LDMOS structure at peak-power levels of over 100 W and frequencies of 2 GHz and above, while ensuring very low drift over time and guaranteed reliability.
Key proponents of LDMOS technology continue to address the problems at the process and circuit levels. For instance, a startup known as Xemod has developed a process that solves the gate-drift problem for LDMOS transistors that can deliver 120 W of peak output power. Also, Motorola is tapping its optimized fifth-generation (HV5) process technology to see another 5% boost in power efficiency at RF frequencies, while targeting less than a 5% gate threshold-voltage (VGS) drift over a 20-year period with no burn-in.
Likewise, Philips Semiconductors and Ericsson are exploiting gold-top metallization for long-term reliability to guarantee very high mean-time-to-failure (MTF) rates for their respective LDMOS parts. Furthermore, they are enhancing the gate-drift characteristics of the device with improvements in the process technology. UltraRF, a semiconductor spin-off of RF power-module manufacturer Spectrian, is similarly focusing on refining oxide processing to alleviate the threshold drift issue associated with LDMOS. Others in this race include STMicroelectronics, Hitachi, RF Micro Devices, and Stanford Microdevices.
"Although recent improvements in device design and processing have eased the drift issue, it has not withered away completely," says Richard J. Clark, Xemod's founder and vice president of product development. According to Clark, "To minimize the effects of hot-carrier injection in LDMOS power transistors, Xemod has concentrated on shaping the area under the gate, as well as incorporating a chemically enhanced gate-oxide formation technique."
It's the optimum combination of device structure and gate-oxide processing that has enabled the company to obtain desired results, Clark notes. Implementing its improved LDMOS devices, Xemod is readying power modules with up to 120 W of output at frequencies as high as 2.1 GHz for high-volume PCS and cellular base-station applications.