As printed-circuit boards become more densely populated, the opportunities for "intra-module" interference grows. Similarly, the probability of "inter-module" interference increases. The move to higher switching rates, higher spectral content, and higher power exacerbates these trends. At the same time, engineers struggle with more stringent emissions regulations. Together, these considerations elevate the need to effectively decouple switching circuits.
To achieve effective decoupling, the decoupling source—invariably a good-quality capacitor located close to the switching circuit—must provide the ac content of the switched current. Meanwhile, the main power source—usually located away from the target—must provide the average current and, hence, all of the energy. This confines the high-frequency currents to a small loop in the vicinity of the target, thus minimizing board emissions. In addition, high-frequency currents are kept off the power and ground buses, which minimizes inductively coupled interference. Furthermore, because the ripple voltage across the decoupler (i1Z1) appears on the power bus, minimizing this voltage will reduce capacitively coupled interference (Fig. 1).
A number of recent papers have considered the effect of both the pc board's bus structure1, 2 and the characteristics of the decoupling capacitors themselves3 on suppressing emissions. Here, we mainly investigate the benefits and caveats of using decoupling networks, which suppress specific frequencies. Engineers are often challenged to suppress one or more clock frequencies and, perhaps, related harmonics or sub-harmonics. In most cases, general decoupler choices do not efficiently address the highly defined suppression targets.
Consider the lumped-parameter model shown in Figure 1. Here, the target (switching) circuit is modeled as an ac current source. Vy (f, t) is the ac voltage developed at point y on the power bus, due to the interaction of switching currents and system impedances; i0 (f, t) is the ac current drawn by the target circuit; i1 (f, t) is that part of i0 supplied by the decoupler, and iS (f, t) is the part of i0 that flows on the power bus. Z is the total impedance of the power bus; Z(y) is the power bus impedance between the decoupler and point y; Z1 is the impedance of the decoupler; and Z0 is the impedance between the decoupler and the target. For convenience, we have incorporated the internal impedance of the main power source into Z. The equations are:
Notice that both iS and Vy have zeroes at Z1 = 0 and have poles at Z1+ Z = 0.
Now, let's consider some familiar decoupler configurations: 1) single-branch, pure (ideal) capacitance; 2) single-branch, capacitance plus inductance; and 3) dual-branch, capacitance plus inductance.
Pure Capacitance
In the good old days, before the advent of modern switching frequencies, it was reasonable to assume pure capacitance for a decoupler. Switching rates were low enough that trace, lead, and connection inductances could usually be ignored. In this case, the model of Figure 2 guides the analysis. From now on, we shall ignore the effect of Z0, since doing so does not affect the generality of our analyses. The equations for this configuration are:
where
The frequency response of the relative amplitude, iS/i0, has a pole at f = fƒ.
The main consideration in such a situation is the selection of C1. This value should be such that the amplitude, |iS/i0|, is well rolled-off in the frequency range of interest, and fƒ is far from this region.
Inductance and Capacitance
Most switching rates are now high enough that pure capacitance has become an untenable assumption for the decoupler. The analysis is better guided by the model of Figure 3. The equations for this configuration are:
where
is a zero of the response, and
is a pole.
The existence of a zero at f = f1 immediately suggests a method of optimally decoupling a specific frequency. That is, choose a decoupling capacitor that just happens to have its impedance anti-resonant at the target frequency. Then, connect this component into a negligible-inductance decoupler branch. At the target frequency, all of the current is provided by the decoupler. None of this current flows in the power bus (or ground bus).
Between the target frequency and the anti-resonant frequencies of the available decoupling capacitors, a sufficiently close match cannot always be found. In this situation, a tuned decoupling can still be achieved by choosing a capacitor with an anti-resonant frequency, far, such that far > f1, where f1 now designates the target frequency. Let C1 be, once again, the capacitance of the decoupling component. Then
where l1 is the intrinsic inductance of the component. Consequently, if external inductance is added to the decoupling circuit, as in
a branch is constructed that maximally decouples the target frequency.
The additional inductance may be inserted in the form of a discrete component. Or, it may be obtained in the form of a pc-board trace of appropriate geometry. For an example of the calculation of trace inductances, see the Rostek article.4
In some situations, it may be worth considering multiple decoupling branches. For example, tuned circuits have residual, if minor, resistance at the anti-resonant frequency. In order to achieve an even lower response at this frequency, identically tuned decoupling branches are sometimes placed in parallel in the circuit.
As printed-circuit boards become more densely populated, the opportunities for "intra-module" interference grows. Similarly, the probability of "inter-module" interference increases. The move to higher switching rates, higher spectral content, and higher power exacerbates these trends. At the same time, engineers struggle with more stringent emissions regulations. Together, these considerations elevate the need to effectively decouple switching circuits.
To achieve effective decoupling, the decoupling source—invariably a good-quality capacitor located close to the switching circuit—must provide the ac content of the switched current. Meanwhile, the main power source—usually located away from the target—must provide the average current and, hence, all of the energy. This confines the high-frequency currents to a small loop in the vicinity of the target, thus minimizing board emissions. In addition, high-frequency currents are kept off the power and ground buses, which minimizes inductively coupled interference. Furthermore, because the ripple voltage across the decoupler (i1Z1) appears on the power bus, minimizing this voltage will reduce capacitively coupled interference (Fig. 1).
A number of recent papers have considered the effect of both the pc board's bus structure1, 2 and the characteristics of the decoupling capacitors themselves3 on suppressing emissions. Here, we mainly investigate the benefits and caveats of using decoupling networks, which suppress specific frequencies. Engineers are often challenged to suppress one or more clock frequencies and, perhaps, related harmonics or sub-harmonics. In most cases, general decoupler choices do not efficiently address the highly defined suppression targets.
Consider the lumped-parameter model shown in Figure 1. Here, the target (switching) circuit is modeled as an ac current source. Vy (f, t) is the ac voltage developed at point y on the power bus, due to the interaction of switching currents and system impedances; i0 (f, t) is the ac current drawn by the target circuit; i1 (f, t) is that part of i0 supplied by the decoupler, and iS (f, t) is the part of i0 that flows on the power bus. Z is the total impedance of the power bus; Z(y) is the power bus impedance between the decoupler and point y; Z1 is the impedance of the decoupler; and Z0 is the impedance between the decoupler and the target. For convenience, we have incorporated the internal impedance of the main power source into Z. The equations are:
Notice that both iS and Vy have zeroes at Z1 = 0 and have poles at Z1+ Z = 0.
Now, let's consider some familiar decoupler configurations: 1) single-branch, pure (ideal) capacitance; 2) single-branch, capacitance plus inductance; and 3) dual-branch, capacitance plus inductance.
Pure Capacitance
In the good old days, before the advent of modern switching frequencies, it was reasonable to assume pure capacitance for a decoupler. Switching rates were low enough that trace, lead, and connection inductances could usually be ignored. In this case, the model of Figure 2 guides the analysis. From now on, we shall ignore the effect of Z0, since doing so does not affect the generality of our analyses. The equations for this configuration are:
where
The frequency response of the relative amplitude, iS/i0, has a pole at f = fƒ.
The main consideration in such a situation is the selection of C1. This value should be such that the amplitude, |iS/i0|, is well rolled-off in the frequency range of interest, and fƒ is far from this region.
Inductance and Capacitance
Most switching rates are now high enough that pure capacitance has become an untenable assumption for the decoupler. The analysis is better guided by the model of Figure 3. The equations for this configuration are:
where
is a zero of the response, and
is a pole.
The existence of a zero at f = f1 immediately suggests a method of optimally decoupling a specific frequency. That is, choose a decoupling capacitor that just happens to have its impedance anti-resonant at the target frequency. Then, connect this component into a negligible-inductance decoupler branch. At the target frequency, all of the current is provided by the decoupler. None of this current flows in the power bus (or ground bus).
Between the target frequency and the anti-resonant frequencies of the available decoupling capacitors, a sufficiently close match cannot always be found. In this situation, a tuned decoupling can still be achieved by choosing a capacitor with an anti-resonant frequency, far, such that far > f1, where f1 now designates the target frequency. Let C1 be, once again, the capacitance of the decoupling component. Then
where l1 is the intrinsic inductance of the component. Consequently, if external inductance is added to the decoupling circuit, as in
a branch is constructed that maximally decouples the target frequency.
The additional inductance may be inserted in the form of a discrete component. Or, it may be obtained in the form of a pc-board trace of appropriate geometry. For an example of the calculation of trace inductances, see the Rostek article.4
In some situations, it may be worth considering multiple decoupling branches. For example, tuned circuits have residual, if minor, resistance at the anti-resonant frequency. In order to achieve an even lower response at this frequency, identically tuned decoupling branches are sometimes placed in parallel in the circuit.