What can designers do with a small-signal FET device that doesn't require input-signal biasing? In other words, what can they do with a device in which the gate-source threshold voltage is zero, rather than around 0.7 V? (Zero is the typical value at IDS = 1 mA, VDS = 0.1 V. The guaranteed maximum and minimum threshold values are ±10 mV in the "A" version of the devices and ±20 mV in the standard version.)
The ALD110800 and ALD110900 from Advanced Linear Devices can be used as basic building blocks for current sources, differential amplifier input stages, transmission gates, and multiplexers. Or, they could be used as enablers for products like remote solar-cell powered sensor arrays and MEMS. An input amplifier stage operating with a 0.2-V supply voltage and a digital inverter operating with a 2-mV supply have been demonstrated in ALD's laboratory.
ALD has marketed single FETs in this EPAD technology since 1997. These new chips are the first parts that match enhancement and depletion-mode FETs to achieve a zero-threshold device. The breakthrough is achieved by measuring out the floating-gate charge with sufficient precision to match the characteristics of the two FETs. The 900 consists of matched enhancement-mode and depletion-mode FETs with floating gates that are programmed like EEPROMs to control the threshold voltage (see the figure). The 800 is a dual version.
Fine control of threshold voltages permits operating voltages as low as 20 mV, enabling analog signal-conditioning circuit designs that run on microwatts of power. Typical input impedance is on the order of 1012 (omega), input capacitance is 2.5 pF, and dc current gain is greater than 108. With VDS = 100 mV, on resistance is 500 (omega) for a gate voltage of 4 V and 104 k(omega) with 0 V on the gate.
Pricing starts at $0.91 in quantities of 1000 pieces.
Advanced Linear Devices
www.aldinc.com