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At 480 Mbits/s, Signal Integrity Becomes An Issue In USB 2.0 Designs

Packaging, board layout, and chassis grounding will all be severely impacted by these high-speed components.

Date Posted: September 18, 2000 12:00 AM

Onto an existing system, USB 2.0 capability may be added by using a PCI add-in card (Fig. 6). This solution solves many of the challenges of a USB 2.0 implementation, and it is the traditional way to add new capabilities that might later appear on the motherboard.

Many, if not all, of the early IEEE-1394 and USB 1.0 implementations were PCI add-in cards. The PCI add-in card can physically be very small, which lends itself well to precise control of trace length and impedance. It can eliminate the routing issues imposed by multiple power planes. It also allows optimum placement of the transceiver IC to the USB connector. Finally, it's neutral with respect to front-panel connectors.

Power management isn't strictly a USB 2.0 issue. Yet, the maturation of power management functionality and customer demand has caused it to become an important design issue that must be addressed. As CPUs become more power-hungry, extending battery life on new laptops is an increasingly problematic concern. The guiding principle in power management is simply to "turn off as much as possible." In many of today's systems, the only component that's "alive" during deep sleep mode is the keyboard.

For instance, in its PC 2001 specification, Microsoft goes into great detail regarding power management, defining a number of system states (D0, D1, D2, and D3) for various activity modes, from being awake, to sleep modes, to full shut-down. Specifically, D0 is the active state at full power; D1, D2, and D3 have limited power, while maintaining the capability of the PC to "wake up" without rebooting. D1 has LSP on and an active port, but the PCI clock is off, or very slow. This power level is approximately 50% of the active state. D2 and D3 (hot) maintain minimal power at less than 1 mA by turning Link Power Status off and suspending port activity. The D3 (cold) state removes power from the chip and eliminates the possibility of "wake up."

One of the new functionalities that USB 2.0 host controllers need to support in PC 2001 systems is Vaux. This auxiliary power supply keeps part of a system powered up even when the rest of the system is "asleep."

EMI becomes an issue with USB 2.0 implementations because of the faster edge rates of a USB 2.0 device. Hopefully, now they will be placed close to the front or back panel of the chassis.

While proper grounding is crucial, other implementation details must be observed too. One obvious concept is to generate the fewest possible emissions. This requires careful design. If all of the signals are perfectly matched in a differential signal environment, then the rising edge will always cancel the falling edge, and no EMI will be generated. Unfortunately, this is rarely, if ever, possible.

Both the USB 1.0 and 2.0 specifications call for a differential bus, so the task of controlling emissions is much less onerous than it would be with a parallel bus, which typically isn't a differential design. Nonetheless, certain events cannot be differential, such as bus reset, where both pins go high simultaneously, or disconnect, where both lines go slightly above "legal" logic 1 voltage. The high-speed signaling mode (chirp) also isn't completely differential.

None of these challenges is new to the industry, and numerous IEEE-1394 designs have conquered similar problems and passed EMI testing. So, designers who have had previous experience with IEEE-1394 designs should have few problems with the new USB 2.0 specification.

The designer's choice of components can have a significant effect on the need for emissions control. Chokes, particularly the new 4-wire common-mode choke, are a standard way of reducing fluctuations. They have proven to be quite effective in IEEE-1394 designs. The problem is that they add to the overall cost of the product. Chip manufacturers like Lucent make it possible to eliminate this cost by providing transceivers that don't require chokes because they generate significantly less EMI.

If the transceiver used in the design has good differential characteristics, and the board layout is designed so that parasitics are matched carefully, EMI can be reduced significantly by simply observing the basics. This includes making sure that the I/O shield is connected securely to the chassis and the receptacle.

EMI testing is time-consuming, exacting, and expensive. Because testing needs to be performed at a special facility with isolated chambers to ensure accurate results, most companies prefer that EMI testing be conducted only once per product. The best strategy, therefore, is to do as much preliminary testing as possible during the design phase. The design tips presented above provide a guide.

EMI testing requires scanning the product through frequencies of up to 1 GHz to see if any signal amplitudes outside the specification exist. According to the USB 2.0 specification, extrapolating EMI by scanning only a few frequencies isn't allowed. It's possible to perform "quick and dirty" testing at the design site using several antennas covering different frequency ranges and taking into account both horizontal and vertical orientations.

Because of the increasing electronic pollution in our environment, however, only a specially isolated chamber can assure an accurate test. For example, Lucent recently conducted a preliminary test with an EMI sniffer and discovered a spike at 900 MHz, despite the fact that nothing in the system ran at 900 MHz. The culprit turned out to be a newly installed cellular telephone tower.

USB 2.0 provides a high-performance upgrade path for PC users. It supports the higher-speed peripherals that are increasingly in demand and offers backwards compatibility with USB 1.0 peripherals, hubs, and hosts.

The USB 2.0 specification calls for more rigorous design and test criteria than its predecessor, but designers who have had experience with the IEEE-1394 specification can take heart. With the 1394 specification leading the way, much of the groundwork for meeting the USB 2.0 specifications has already taken place. The added performance and flexibility of a USB 2.0-enabled PC make mastering the new design challenges well worth the effort for the designer and for the end user alike.

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