Switches and routers are demanding higher QoS levels. This includes guaranteed bandwidth for real-time traffic, prioritized delivery for high-priority traffic, reliable delivery, in-order cells, and differing levels of delivery service, requirements that go beyond the classic OSI layer 2 and definitions. Many requirements depend on different levels of delivery service that can be sold to customers on an end-to-end basis. As a result, next-generation switches and routers tend to differ only in where they're deployed in the network hierarchy and what subnets/nets they link into. The same switch-fabric hardware can now serve as a switch or a router, and as bridge between different protocols and line speeds.
QoS and Classes of Service (CoS) are typically performed by the switch fabric through priority levels. There can be some specialized paths and links for some traffic (such as the PMC-Sierra ETT1 chip set) that provide a separate set of queues and a switch path for TDM traffic. More priority levels and specialty groups translate into priority differentiation for the incoming traffic.
Most newer and emerging switch fabrics provide four to eight priority levels. Some, such as Vitesse's TeraSteam, support up to 16 for even finer cell-control granularity. These levels are typically implemented as expanded VoQ queues to queue up ingress cells for transmission through the fabric. VoQ queues are implemented on a per-port basis. For example, each input port has a full set of VoQ queues to hold incoming cells as they await a grant from the switch. These queues are generally implemented in the switch fabric's QMs.
Ingress priority queues hold the ingress messages for transmission through the fabric. They're selected for the Request/Grant sequence by a variety of priority implementations. Most fabrics perform a two-level selection process. A programmable number of the higher-priority queues are handled in strict priority fashion. The remaining lower-priority queues support a weighted round-robin selection scheme.
PowerX's Star-2000 QM supports 16 ports with four priority levels, each with four service and one multicast channel. Each port has 16 separate unicast queues (four priority by four service channels) and four multicast queues. With a port, 16 flows can be individually assigned bandwidth based on order of importance. Arbitration for the 321 VoQs (16 × 4 × 4 = 1 broadcast channel) is distributed at the central arbiter for priority and at the VM for service level.
Because each VM serves as an ingress and egress port for its line card, it also implements the output port or egress queues. These generally aren't broken down into priority queues, as are ingress (VoQ) queues.
Throughput: Emerging backplane switch-fabric chip sets support higher line throughput rates and higher aggregate throughputs. For most sets, a minimal configuration supports a 40-Gbit/s throughput (full-duplex, one way). Building on that base, designers can easily achieve 160- to 320-Gbit/s throughput switches, especially with OC-192 ports. Some of these chip sets, such as Agere's PI140xx and PetaSwitch's Pisces, qualify for high-end switches/routers and have aggregate throughput rates of up to 2.5 and 5.2 Tbits/s, respectively.
But to meet the switch fabric's external I/O rates, internal system rates need higher internal bandwidths. Cell transfers within the switch fabric take on overhead ranging from simple matters, like cell header overhead, to more complex functions such as cell enqueuing and system cell flow control.
To handle overhead, most switch fabrics have internal bandwidths of 2× or more. This "speedup" depends on how many switches are stacked. Adding chips lowers contention and ups speed.