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CMOS Transceiver Chip Allows 50-Gbit/s Serial Data Transmissions

This low-power IC makes possible serial backplanes that boost the performance of Internet routers, switches, and optical networks.

Date Posted: December 18, 2000 12:00 AM
Author: Lou Frenzel

To understand the limitations of a parallel bus approach, consider this example. In a 16-port Gigabit Ethernet switch, each I/O port pair resides on one line card, supporting either one true full-duplex Gigabit Ethernet, or 10/100BaseT full-duplex links. A high-bandwidth bus needs to deliver the data across the backplane to and from the switch card.

At a full-duplex data rate of 1 Gbit/s, a parallel bus operating at 50 MHz requires a 40-bit width, while a 16-port system requires a backplane that is 640 bits wide. Accounting for extra bandwidth for clock, error-monitoring, and control signals, designers find that a parallel backplane can easily stretch to 800 or even 1000 bits wide.

Designers who need to support more ports or faster data rates could accommodate the increased bandwidth requirement by widening the bus or increasing the bus frequency. Beyond 50 MHz, upping the bus frequency usually isn't an option. This is due to the transmission-line effects caused by impedance mismatches, crosstalk, and signal skew. On the other hand, widening the bus results in higher connector pin counts, thereby increasing cost and insertion force (the force required to insert a board into the backplane connector).

Greater speeds can be achieved over longer distances with a minimum amount of noise by converting the parallel data and transmitting it over one or more serial paths. In a conventional three-state bidirectional data bus with four interface cards and connectors, bus speeds of 33 and 66 MHz are typical. Bus loads and distances must be reduced considerably for the higher speeds. In addition, bus-arbitration schemes have to be used, which further reduces throughput.

But the BBT3800 solves this problem. This chip accommodates 80 parallel inputs and 80 parallel outputs and converts them into eight serial inputs and eight serial outputs, all running at a speed of up to 3.125 Gbits/s.

Users can employ the device in a serial backplane whereby four devices or line cards talk to one another serially via a copper transmission line of up to 50 cm long, or over an even longer distance using a fiber-optic cable (Fig. 3). No contention is involved, and all interfaces are always on and capable of communicating in a full-duplex manner with any other device. Overall, serial backplanes like this one provide higher performance, are easier to scale, operate over longer distances, use fewer drivers, and enable a lower system cost.

Optical Applications
Other applications include optical fiber networks, like SONET and Fibre Channel. The BBT3800 can implement a SONET/SDH network at speeds of up to 9.953 Gbits/s (OC-192) by using four serial channels that each run at 2.488 Gbits/s (OC-48). When building line-interface cards, the BBT3800 allows the packaging of more channels per enclosure with lower power consumption.

Furthermore, the BBT3800 is made on a 0.18-µm CMOS process. It's contained in a 676-pin ball grid array (BGA) package.

Price & Availability
The nPower BBT3800 will be available in sample quantities in January. It's priced at $135 each in 1000-unit quantities. A four-channel version, the BBT3400, is packaged in a 289-pin BGA. Now sampling, it costs $70 each in quantities of 1000.

BitBlitz Communications Inc., 830 Hillview Ct., Suite 290, Milpitas, CA 950356. Contact Leo K. Wong, director of strategic marketing, by phone at (408) 586-9886, ext. 204; fax at (408) 586-9884; or via e-mail at lwong@bitblitzcom.com. The company's Web address is www.bitblitzcom.com.

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