For instance, the DPWM must have finer resolution than the ADC. Otherwise, a 1-LSB change in the ADC output could cause the DPWM to shift the output voltage to a level greater than what the ADC sees as 1 LSB. As a result, the output voltage would toggle between two values in the steady state, a situation called "limit cycling."
Avoiding that cycling isn't necessarily easy, though. That's because giving
the DPWM finer resolution means stepping up its pulse rate. (Pulse rate determines
how many bits can be generated in any given time period.) However, the DPWM
pulse rate limits the time it has in which to compress all those bits from the
controller. The example that's in the Artesyn white paper addresses a hypothetical
DPWM with a 1-MHz switching rate and a 10-bit ADC. Calculations show that the
modulator would require a pulse rate greater than 1 GHz.
Such a high rate is impractical, of course, so digital controller designers must come up with an alternative solution. One is to introduce some DPWM clock dither. The regulator output filter averages any pulse train that's fed into it. That makes it possible to adjust the width of every mth output pulse by the equivalent of 1 LSB.
This increases or decreases the average value of the resulting pulse train by (1/m) times the resolution of 1 LSB. If 1 LSB at the controller input moves the output pulse train average by 10 mV, which shortens every fourth pulse by an amount of time corresponding to 10 mV, the average output voltage through the filter then will reduce by 10 mV/4 or 2.5 mV.
ALTERNATIVE APPROACHES
While almost all digital controllers use ADCs and stored-program controllers,
this isn't the only possible approach. Last year, Zilker Labs noted that achieving
the kind of step responses (hundreds of amperes per nanosecond) imposed by the
latest Pentium-class processors required a pretty fast and, therefore, power-hungry
DSP or micro in the controller.
As a lower-power alternative, the company introduced a controller based on comparators (rather than an ADC) and a state machine (rather than a stored-program approach). (See "PMBus Controller Takes A State Machine Approach" at www. electronicdesign.com, ED Online 11614.)
Furthermore, the simple buck and boost topologies described earlier aren't the only ways to accomplish digital regulation. Vicor presents a vastly different approach based on a much more sophisticated regulator topology than the simple buck or boost described above and a repartitioning of the elements in the power-distribution paradigm. (See ED Online 3185, 5948, 9092, and 11119 at www.electronicdesign.com.)
In the long run, digital control was a breakthrough technology. But many of
digital control's benefits have now migrated back into analog-control regulators.
NEED MORE INFORMATION?
Astec Power www.astecpower.com
Artesyn Technologies www.artesyn.com
Emerson Network Power www.gotoemerson.com
Fairchild Semiconductor www.fairchildsemi.com
Intersil www.intersil.com
Linear Technology www.linear.com
Maxim Integrated Products www.maxim-ic.com
National Semiconductor www.national.com
Power-One www.power-one.com
Primarion www.primarion.com
Silicon Laboratories www.silabs.com
Summit Microelectronics www.summitmicro.com
Texas Instruments www.ti.com
Vicor www.vicr.com
Zilker Labs www.zilkerlabs.com |