EDA Alert: December 16, 2002

==================================

EDA Alert e-Newsletter
PlanetEE - www.planetee.com
December 2, 2002

=============================

*************************ADVERTISEMENT***************************
Cadence NanoRoute webinar, Wednesday, December 11

NanoRoute Ultra is the industry's fastest, highest-
performance routing and physical optimization solution.
Learn how this core technology of the Cadence Encounter System
reduces your time-to-tapeout on large SoC designs.

Register Now!
http://lists.planetee.com/cgi-bin3/flo?y=eOiR0DJhFR0BSK06fT0AF
*****************************************************************

You've received this e-newsletter for one of three reasons:
1) you received our EDA Alert newsletter in the past,
2) you've signed up for it at http://www.planetee.com, or
3) you've identified yourself as a specifier of EDA tools on
your qualification form as a reader of Electronic Design
Magazine.
Please see below for unsubscribe and address-change instructions.


Today's Table of Contents:
1. Viewpoint - The 2003 EDA Holiday Wish List
2. Synchronicity Enhances IP Distribution Toolset
3. Cadence Taps Oridus For Web Conferencing
4. ACAD Launches Dynamic Power And IR-Drop Analysis Tool
5. Cadence Completes Purchase Of Antrim Assets
6. Accent And Verisity Join OCP-IP
7. Happenings
Accellera Seminar: An Introduction to SystemVerilog
DesignCon 2003
Design and Verification Conference and Exhibition
(DVCon, formerly HDLCon)
DATE 03

************
1. Viewpoint - Exclusive to EDA Alert
************
The 2003 EDA Holiday Wish List
By David Maliniak, EDA Technology Editor

If you think back to when you were a kid, you'll may remember
writing at least one letter to Santa Claus. Everyone likes gifts,
especially during the holiday season. And now, as an all-grown-up
design engineer and consumer of EDA tools, you've probably got a
wish list of EDA-related items you'd like to find in your
stocking. Here's a short list that might look like yours. And
here's hoping that at least some of them come true sooner rather
than later.

There's a pressing need for tools to make dynamic power analysis
a reality, as it is critical at 90 nm and 65 nm process nodes but
is also lacking at the 130-nm node.

System verification of PCB designs within software is an
important part of the design flow. Let's hope for more
cooperation between EDA and IC vendors on high-quality models
that support the latest high-end buffer technologies and make
simulation easier and more accurate.

Tool interoperability is a long-held dream for EDA users. The
Silicon Integration Initiative's OpenAccess Coalition is perhaps
the last and best hope for interoperability to become a reality.
It'd be nice--real nice--if EDA's major players could all get
together on this. It's a win-win situation all the way around if
they do.

Technology breakthroughs are needed to mend the fundamental
disconnect between hardware and software modeling at high levels
of abstraction. It's looking as if SystemC will become the
standard-bearer for architectural and system modeling and will
facilitate co-simulation with HDL and SystemC platform-based
design.

EDA and test vendors must partner to address the poor or
non-existent flow of data from the test process back into the
design cycle. Such partnerships could result in methodologies
that avoid extra steps in the process of ensuring that IC designs
are testable.

Finally, let's see an end to the intramural squabbling amongst
EDA vendors. Some industry observers have bemoaned the lack of
attention paid to EDA companies on Wall Street. It could be that
Wall Street is watching for signs of maturity (or at least mature
behavior) from an industry that's so key to the future success of
the electronic OEM community.

I'd like to see your EDA wish lists for 2003, along with any and
all comments on the EDA Alert e-Newsletter. Tell me what you'd
like to see more or less of in your in-box. Please write me at:
dmaliniak@penton.com.

*************************ADVERTISEMENT***************************
Free Signal Integrity Information: From characterizing critical
components to validating your design's physical layer, Agilent
can help. Application notes, technical papers and more on-line.
Free CD-ROM with the eSeminar: "Taking the Mystery out of Signal
Integrity." featuring Eric Bogatin of GigaTest Labs. Good
information, right under your nose.

http://lists.planetee.com/cgi-bin3/flo?y=eOiR0DJhFR0BSK05zp0A1
*****************************************************************

*******
2. News
*******
Synchronicity Enhances IP Distribution Toolset Version 2.0 of
Synchronicity's Publisher Suite bundles the IP Gear Catalog and
IP Gear Helpdesk and upgrades both to a three-tier architecture
that runs on Oracle or PostgreSQL databases. The system, which is
for design reuse and intellectual property (IP) management and
distribution, gains significant performance and scalability
improvements from the database upgrade and from the architecture
enhancement that separates the application layer from the
database layer (the third tier is the web browser client). With
Oracle, this allows each tier to run on distinct servers, in
parallel, for large-scale deployments serving many users.

Publisher Suite v2.0, bundling the IP Gear Catalog and Helpdesk,
is available now with solutions that span from workgroups to
multi-national organizations for $150,000 to $750,000. Existing
IP Gear customers on active maintenance can receive the upgrade
for free.
http://lists.planetee.com/cgi-bin3/flo?y=eOiR0DJhFR0BSK06fU0AG

*******
3. News
*******
Cadence Taps Oridus For Web Conferencing
In a new licensing deal, Oridus Inc. will equip Cadence field
application engineers (FAEs) and customer support centers with
its SpaceCruiser client/server software for real-time desktop
sharing and Web conferencing. "SpaceCruiser establishes a fast,
secure Web-link so we can be virtually 'sitting' at our
customer's desk within minutes. With our customer's permission,
we can take over control of the workstation to run Cadence
products remotely for real-time support," said Dipender Saluja,
corporate vice president of technical field operations at
Cadence.

Oridus' cross-platform and cross-network solutions harness the
power of the Internet and corporate Intranets. Residing behind a
customer's corporate firewall, Oridus' customers have full
control and knowledge of the software and capabilities deployed
into their network environment. In addition, Oridus employs
several levels of security including 128-bit SSL encryption, LDAP
integration, and role-based authentication procedures.
http://lists.planetee.com/cgi-bin3/flo?y=eOiR0DJhFR0BSK06fV0AH

*******
4. News
*******
ACAD Launches Dynamic Power And IR-Drop Analysis Tool
In deep sub-micron design, many chip failures can be traced to
IR-drop induced functional problems, even after the design has
passed functional verification. ACAD's FinePower is a dynamic
power and IR-drop analysis tool for SoCs. The tool identifies the
real peak IR-drop values without any user-defined estimation
factors. FinePower monitors the IR-Drop variation during the
simulation time, and extracts the maximum IR-drop period and
position. Using the gate-level power library and event
information from VCD, FinePower computes the current
signature in the time-domain for a comprehensive IR-drop
simulation.

The FinePower tool starts from $40,000 US for a time-based
license. It's supported on Sun Solaris, HP-UX, and Linux
platforms.
http://lists.planetee.com/cgi-bin3/flo?y=eOiR0DJhFR0BSK06fW0AI

*******
5. News
*******
Cadence Completes Purchase Of Antrim Assets
Cadence Design Systems has finalized its purchase of the assets
of Antrim Design Systems, Inc., a Scotts Valley, Calif.-based
company that provides analog design tools. This purchase, which
also involves the hiring of Antrim's core R&D, sales and support
team, adds rapid analog prototyping and behavioral
characterization and modeling support, augmenting Cadence's
existing Analog Design Environment roadmap.

Lavi Lev, Cadence executive vice president of IC Solutions,
stressed that Cadence continues to pursue strategic acquisitions,
despite trying economic conditions. Antrim's current products
include Aptivia, which provides automated analysis, optimization,
characterization and verification; and DCM, which provides
characterization and modeling.
http://lists.planetee.com/cgi-bin3/flo?y=eOiR0DJhFR0BSK0paF0As

*******
6. News
*******
Accent And Verisity Join OCP-IP
Two new members have bolstered the efforts of the Open Core
Protocol International Partnership (OCP-IP), an industry
organization formed in December 2001 to promote and support the
Open Core Protocol (OCP) as a socket standard that ensures rapid
creation and integration of interoperable virtual components.
Coming on board with the OCP-IP are Accent, a design services
joint venture between STMicroelectronics and Cadence Design
Systems; and Verisity Ltd., a leader in automation of functional
verification. Accent's membership helps strengthen the OCP-IP's
European presence, already significant with the likes of Amphion
Semiconductor, Siroyan, VCX, and Valiosys counted as members.

For more information about these organizations check out the links below

www.OCPIP.org click here => http://lists.planetee.com/cgi-bin3/flo?y=eOiR0DJhFR0BSK06fk0Ac
www.accent.it click here => http://lists.planetee.com/cgi-bin3/flo?y=eOiR0DJhFR0BSK06fY0AK
www.verisity.com click here => http://lists.planetee.com/cgi-bin3/flo?y=eOiR0DJhFR0BSK0paJ0Aw

*************
7. Happenings
*************
Accellera Seminar: An Introduction to SystemVerilog
Santa Clara Marriott
December 5, 2002
http://lists.planetee.com/cgi-bin3/flo?y=eOiR0DJhFR0BSK06fl0Ad

DesignCon 2003
Santa Clara Convention Center, Santa Clara, CA
January 27-30, 2003
http://lists.planetee.com/cgi-bin3/flo?y=eOiR0DJhFR0BSK05cn0Ab

Design and Verification Conference and Exhibition
(DVCon, formerly HDLCon)
Doubletree Hotel, San Jose, CA
February 24-26, 2003
http://lists.planetee.com/cgi-bin3/flo?y=eOiR0DJhFR0BSK05co0Ac

DATE 03
ICM, Munich, Germany
March 3-7, 2003
http://lists.planetee.com/cgi-bin3/flo?y=eOiR0DJhFR0BSK0paO0A2

EDA ALERT e-NEWSLETTER CONTACTS

===============================

EDA Technology Editor, Electronic Design: David Maliniak
mailto:dmaliniak@penton.com

Advertising/Sponsorship Opportunities:
Bill Baumann, bbaumann@penton.com

=========================

To subscribe send a blank email to:
mailto:EDA_Alert_Sub@lists.planetee.com
To unsubscribe send a blank email to:
mailto:EDA_Alert_Unsub@lists.planetee.com
PlanetEE's e-Newsletter homepage:
http://lists.planetee.com/cgi-bin3/flo?y=eOiR0DJhFR0BSK05cp0Ad

===============================
Copyright 2002 Penton Media Inc.

==================================

EDA Alert e-Newsletter
PlanetEE - www.planetee.com
December 2, 2002

=============================

*************************ADVERTISEMENT***************************
Cadence NanoRoute webinar, Wednesday, December 11

NanoRoute Ultra is the industry's fastest, highest-
performance routing and physical optimization solution.
Learn how this core technology of the Cadence Encounter System
reduces your time-to-tapeout on large SoC designs.

Register Now!
http://lists.planetee.com/cgi-bin3/flo?y=eOiR0DJhFR0BSK06fT0AF
*****************************************************************

You've received this e-newsletter for one of three reasons:
1) you received our EDA Alert newsletter in the past,
2) you've signed up for it at http://www.planetee.com, or
3) you've identified yourself as a specifier of EDA tools on
your qualification form as a reader of Electronic Design
Magazine.
Please see below for unsubscribe and address-change instructions.


Today's Table of Contents:
1. Viewpoint - The 2003 EDA Holiday Wish List
2. Synchronicity Enhances IP Distribution Toolset
3. Cadence Taps Oridus For Web Conferencing
4. ACAD Launches Dynamic Power And IR-Drop Analysis Tool
5. Cadence Completes Purchase Of Antrim Assets
6. Accent And Verisity Join OCP-IP
7. Happenings
Accellera Seminar: An Introduction to SystemVerilog
DesignCon 2003
Design and Verification Conference and Exhibition
(DVCon, formerly HDLCon)
DATE 03

************
1. Viewpoint - Exclusive to EDA Alert
************
The 2003 EDA Holiday Wish List
By David Maliniak, EDA Technology Editor

If you think back to when you were a kid, you'll may remember
writing at least one letter to Santa Claus. Everyone likes gifts,
especially during the holiday season. And now, as an all-grown-up
design engineer and consumer of EDA tools, you've probably got a
wish list of EDA-related items you'd like to find in your
stocking. Here's a short list that might look like yours. And
here's hoping that at least some of them come true sooner rather
than later.

There's a pressing need for tools to make dynamic power analysis
a reality, as it is critical at 90 nm and 65 nm process nodes but
is also lacking at the 130-nm node.

System verification of PCB designs within software is an
important part of the design flow. Let's hope for more
cooperation between EDA and IC vendors on high-quality models
that support the latest high-end buffer technologies and make
simulation easier and more accurate.

Tool interoperability is a long-held dream for EDA users. The
Silicon Integration Initiative's OpenAccess Coalition is perhaps
the last and best hope for interoperability to become a reality.
It'd be nice--real nice--if EDA's major players could all get
together on this. It's a win-win situation all the way around if
they do.

Technology breakthroughs are needed to mend the fundamental
disconnect between hardware and software modeling at high levels
of abstraction. It's looking as if SystemC will become the
standard-bearer for architectural and system modeling and will
facilitate co-simulation with HDL and SystemC platform-based
design.

EDA and test vendors must partner to address the poor or
non-existent flow of data from the test process back into the
design cycle. Such partnerships could result in methodologies
that avoid extra steps in the process of ensuring that IC designs
are testable.

Finally, let's see an end to the intramural squabbling amongst
EDA vendors. Some industry observers have bemoaned the lack of
attention paid to EDA companies on Wall Street. It could be that
Wall Street is watching for signs of maturity (or at least mature
behavior) from an industry that's so key to the future success of
the electronic OEM community.

I'd like to see your EDA wish lists for 2003, along with any and
all comments on the EDA Alert e-Newsletter. Tell me what you'd
like to see more or less of in your in-box. Please write me at:
dmaliniak@penton.com.

*************************ADVERTISEMENT***************************
Free Signal Integrity Information: From characterizing critical
components to validating your design's physical layer, Agilent
can help. Application notes, technical papers and more on-line.
Free CD-ROM with the eSeminar: "Taking the Mystery out of Signal
Integrity." featuring Eric Bogatin of GigaTest Labs. Good
information, right under your nose.

http://lists.planetee.com/cgi-bin3/flo?y=eOiR0DJhFR0BSK05zp0A1
*****************************************************************

*******
2. News
*******
Synchronicity Enhances IP Distribution Toolset Version 2.0 of
Synchronicity's Publisher Suite bundles the IP Gear Catalog and
IP Gear Helpdesk and upgrades both to a three-tier architecture
that runs on Oracle or PostgreSQL databases. The system, which is
for design reuse and intellectual property (IP) management and
distribution, gains significant performance and scalability
improvements from the database upgrade and from the architecture
enhancement that separates the application layer from the
database layer (the third tier is the web browser client). With
Oracle, this allows each tier to run on distinct servers, in
parallel, for large-scale deployments serving many users.

Publisher Suite v2.0, bundling the IP Gear Catalog and Helpdesk,
is available now with solutions that span from workgroups to
multi-national organizations for $150,000 to $750,000. Existing
IP Gear customers on active maintenance can receive the upgrade
for free.
http://lists.planetee.com/cgi-bin3/flo?y=eOiR0DJhFR0BSK06fU0AG

*******
3. News
*******
Cadence Taps Oridus For Web Conferencing
In a new licensing deal, Oridus Inc. will equip Cadence field
application engineers (FAEs) and customer support centers with
its SpaceCruiser client/server software for real-time desktop
sharing and Web conferencing. "SpaceCruiser establishes a fast,
secure Web-link so we can be virtually 'sitting' at our
customer's desk within minutes. With our customer's permission,
we can take over control of the workstation to run Cadence
products remotely for real-time support," said Dipender Saluja,
corporate vice president of technical field operations at
Cadence.

Oridus' cross-platform and cross-network solutions harness the
power of the Internet and corporate Intranets. Residing behind a
customer's corporate firewall, Oridus' customers have full
control and knowledge of the software and capabilities deployed
into their network environment. In addition, Oridus employs
several levels of security including 128-bit SSL encryption, LDAP
integration, and role-based authentication procedures.
http://lists.planetee.com/cgi-bin3/flo?y=eOiR0DJhFR0BSK06fV0AH

*******
4. News
*******
ACAD Launches Dynamic Power And IR-Drop Analysis Tool
In deep sub-micron design, many chip failures can be traced to
IR-drop induced functional problems, even after the design has
passed functional verification. ACAD's FinePower is a dynamic
power and IR-drop analysis tool for SoCs. The tool identifies the
real peak IR-drop values without any user-defined estimation
factors. FinePower monitors the IR-Drop variation during the
simulation time, and extracts the maximum IR-drop period and
position. Using the gate-level power library and event
information from VCD, FinePower computes the current
signature in the time-domain for a comprehensive IR-drop
simulation.

The FinePower tool starts from $40,000 US for a time-based
license. It's supported on Sun Solaris, HP-UX, and Linux
platforms.
http://lists.planetee.com/cgi-bin3/flo?y=eOiR0DJhFR0BSK06fW0AI

*******
5. News
*******
Cadence Completes Purchase Of Antrim Assets
Cadence Design Systems has finalized its purchase of the assets
of Antrim Design Systems, Inc., a Scotts Valley, Calif.-based
company that provides analog design tools. This purchase, which
also involves the hiring of Antrim's core R&D, sales and support
team, adds rapid analog prototyping and behavioral
characterization and modeling support, augmenting Cadence's
existing Analog Design Environment roadmap.

Lavi Lev, Cadence executive vice president of IC Solutions,
stressed that Cadence continues to pursue strategic acquisitions,
despite trying economic conditions. Antrim's current products
include Aptivia, which provides automated analysis, optimization,
characterization and verification; and DCM, which provides
characterization and modeling.
http://lists.planetee.com/cgi-bin3/flo?y=eOiR0DJhFR0BSK0paF0As

*******
6. News
*******
Accent And Verisity Join OCP-IP
Two new members have bolstered the efforts of the Open Core
Protocol International Partnership (OCP-IP), an industry
organization formed in December 2001 to promote and support the
Open Core Protocol (OCP) as a socket standard that ensures rapid
creation and integration of interoperable virtual components.
Coming on board with the OCP-IP are Accent, a design services
joint venture between STMicroelectronics and Cadence Design
Systems; and Verisity Ltd., a leader in automation of functional
verification. Accent's membership helps strengthen the OCP-IP's
European presence, already significant with the likes of Amphion
Semiconductor, Siroyan, VCX, and Valiosys counted as members.

For more information about these organizations check out the links below

www.OCPIP.org click here => http://lists.planetee.com/cgi-bin3/flo?y=eOiR0DJhFR0BSK06fk0Ac
www.accent.it click here => http://lists.planetee.com/cgi-bin3/flo?y=eOiR0DJhFR0BSK06fY0AK
www.verisity.com click here => http://lists.planetee.com/cgi-bin3/flo?y=eOiR0DJhFR0BSK0paJ0Aw

*************
7. Happenings
*************
Accellera Seminar: An Introduction to SystemVerilog
Santa Clara Marriott
December 5, 2002
http://lists.planetee.com/cgi-bin3/flo?y=eOiR0DJhFR0BSK06fl0Ad

DesignCon 2003
Santa Clara Convention Center, Santa Clara, CA
January 27-30, 2003
http://lists.planetee.com/cgi-bin3/flo?y=eOiR0DJhFR0BSK05cn0Ab

Design and Verification Conference and Exhibition
(DVCon, formerly HDLCon)
Doubletree Hotel, San Jose, CA
February 24-26, 2003
http://lists.planetee.com/cgi-bin3/flo?y=eOiR0DJhFR0BSK05co0Ac

DATE 03
ICM, Munich, Germany
March 3-7, 2003
http://lists.planetee.com/cgi-bin3/flo?y=eOiR0DJhFR0BSK0paO0A2

EDA ALERT e-NEWSLETTER CONTACTS

===============================

EDA Technology Editor, Electronic Design: David Maliniak
mailto:dmaliniak@penton.com

Advertising/Sponsorship Opportunities:
Bill Baumann, bbaumann@penton.com

=========================

To subscribe send a blank email to:
mailto:EDA_Alert_Sub@lists.planetee.com
To unsubscribe send a blank email to:
mailto:EDA_Alert_Unsub@lists.planetee.com
PlanetEE's e-Newsletter homepage:
http://lists.planetee.com/cgi-bin3/flo?y=eOiR0DJhFR0BSK05cp0Ad

===============================
Copyright 2002 Penton Media Inc.