To enable a better chip-level solution, another DWG has concentrated on developing a specification for the attributes of an on-chip bus. The specification provides a detailed description of the requirements for on-chip buses. That includes documentation, physical deliverables, and technical bus attributes. It also describes a set of attributes for system integrators, virtual component developers, and bus developers.
Just released is one more standard from the DWGs. It's a system-level interface behavioral documentation standard. This document provides a description of the mechanisms needed to assure the complete description of communication at various levels of abstraction. It allows designers to separate the virtual component's behavior from its communications protocols. That eases the reuse of the same behavioral block with different interfaces.
Still other DWGs are focusing on several additional issues. One is a guideline for test-data interchange formats. Another is a specification for virtual-component transfers. A third covers the VSIA system-level design-model taxonomy. Defined by this taxonomy are the nature, the uses, and a complete and consistent terminology for a wide range of different virtual-component models at all levels of abstraction.
By leveraging all of these standards and guidelines, designers should be able to create highly reusable IP blocks that can readily be co-integrated on a single chip. Complementing this effort, the RAPID Association, Campbell, Calif., focuses on more commercial aspects. These include increasing IP quality, standardizing the IP delivery format, protecting IP by determining the necessary technical and legal solutions, and then creating acceptable solutions for the IP customers and providers. Also, the group will try to make access to IP easier and raise the awareness of IP's value.
Working closely with RAPID as well is the Virtual Component Exchange (VCX), Livingston, Scotland. The goal of the VCX group is to create a safe, efficient marketplace for IP, which the organization expects to reduce the time to market for new products and potentially lower overall costs.
Further, the RAPID Association and VCX have formed some joint task forces to share ideas and expertise on three key industry issues: creating effective business models for IP companies, creating and using Internet-based IP identification and qualification, and creating licensing models that provide benefits for both providers and systems companies.
Aside from the finger-pointing that takes place when a design doesn't work the first time, the legal issues surrounding IP usually revolve around the licensing/purchase of the IP. Several options now typically exist with IP. Designers can ink a deal that gives them unlimited use of a block across multiple SoC designs. Or, a license might just cover the use of the core for a single SoC implementation.
Additional license variations could involve the licensing of hard cores versus soft cores, royalty plus upfront fees, and many other options. The decision as to which option to go with is extremely application-dependent, due to the fact that the application will determine the potential sale opportunities and, hence, the volume of usage.