Jitter is deviation from the ideal timing of an event that affects the synchronization of clock-recovery circuits. It's divided into random, deterministic, and frequency-dependent components. Random jitter is essentially thermal noise. It's Gaussian in nature, and typically specified in picoseconds on a root-mean-square (rms) basis. Deterministic jitter is caused by bandwidth limiting in the data path, and adds linearly. Frequency-dependent-jitter is brought about by noise, typically due to switching power supplies. Figure 6 shows the sources of jitter in a link design.
As the frequency of a signal increases, it is more easily broadcasted. Guidelines for controlling radiation effects, such as crosstalk, noise, and EMI, include:
- Avoid 180° turns, 90° corners, and slots in power and ground planes. All of these create antenna effects.
- Keep high-speed differential traces short, of equal length, and close together to decrease noise susceptibility and EMI.
- Minimize ground loops by placing signal planes adjacent to power and/or ground planes. Here are the common issues affecting the return-current path: poor connector-pin assignment, breaks in power or ground planes adjacent to a signal plane, and poor shield grounding of copper cables.
If noise, crosstalk, or EMI is a concern in a design, keep sensitive high-speed traces in stripline environments. That will provide the best performance.
Once you've mastered the basics, all that remains is putting a system together. Components in the serial data path include transmit and receive serializer/deserializers, backplane connectors, and the crosspoint switch matrix. In laying out the port card, place the serializer as near to the backplane connector as possible. Hand-route the high-speed traces; it shouldn't be difficult to keep them 3 in. or less in length. For convenience, make these traces microstrip structures to aid component placement and facilitate board debugging.
The backplane connector's impedance determines the required characteristic impedance of the signal traces. This, in turn, is used to figure out the board stack-up. Serial-backplane connectors incorporate shielding techniques and good impedance control to maximize the signal integrity of high-speed signals.
In a 19-in. rack-mounted system, the maximum trace length across the backplane is approximately 24 in. This can be negotiated with good signal integrity at 1.25-Gbit/s data rates. Backplane traces are implemented as striplines. To avoid crosstalk on these long signal runs, spacing between adjacent signal channels is typically 2.5 to 3 times the trace width. Add copper-poured grounds between the signal channels to increase crosstalk immunity.
Board-material selection can improve both signal quality and density. At signal speeds of less than 2.5 Gbits/s, FR4 will perform adequately across a 19-in. backplane. Speeds ranging from 2.5 to 5 Gbits/s may benefit from alternative board materials. For signal rates above 5 Gbits/s, look to alternative interconnect technologies, such as fiber-optic interconnects.
The following are the signal-integrity issues associated with the crosspoint matrix: channel-to-channel skew, rise-/fall-time degradation (deterministic jitter), signal attenuation, and crosstalk.
Skew can be controlled in the layout of the backplane and switch-card traces. If required, repeaters may be employed on the switch card to improve jitter and restore signal levels. Examine these issues prior to final layout through breadboarding and simulation.
The selection of a transmission medium, copper versus optical, is dictated by distance, cost, and signal speed. Interchassis signaling may be accomplished over equalized STP cable at signal speeds ¾1.25 Gbits/s. At data rates of 2.5 Gbits/s and above, signaling between chassis is typically optical. This provides better signaling characteristics, as well as flexibility in system architecture. The cost of implementing a fiber-optic interconnect, however, is 25% to 50% higher than copper. The cost delta is in the optical- to-electrical-conversion and associated analog components.
Since the bandwidth through fiber-optic cable is virtually unlimited, its use in serial-backplane systems allows multiple architecture configurations. Placing port cards and switch cards in separate chassis provides a path to modular scalability. Mesh architectures, which employ crosspoint switches on the port cards, eliminate the independent switch card.
Using today's fiber-optic interconnect technology, aggregate channels prior to transport between chassis to minimize cost. In the near future, parallel optical fiber will allow multiple optical connections through a small-form-factor connector. This will bypass the requirement for a copper backplane.
References:
- Palkert, Tom, and Spehn, Dick, "Designing A High-Bandwidth ATM Switch," Electronic Design, May 13, 1996; p. 112.
- Wadell, Brian C., Transmission Line Design Handbook, Artech House Inc., 1991.
- Johnson, Howard W., and Graham, Martin, High-Speed Digital Design: A Handbook of Black Magic, Prentice Hall PTR, 1993.