The chip performs multiprotocol processing, advanced packet filtering, and Sonet overhead processing. It incorporates an OIF SPI-4 phase 2 interface for transferring system-side packets, an OIF SFI-4/802.3ae XSBI interface for connection to PHY modules, an 802.3ae XGMII interface for connection to PCS/PMD modules, and a 16-bit control interface. Network Elements offers accompanying comprehensive application programming interface (API) software for the LiASIC that runs on the customer's line card control processor.
Another new 10GE entrant is Mysticom's MY3004 transceiver. It's a four-channel, 3.125-Gbit/s serializer/deserializer (SERDES) device for backplane and 10GE applications. The MY3004 is compatible with the IEEE-802.3ae 10GE XAUI specification. It incorporates a digital receiver that reduces the BER by two orders of magnitude in noisy environments.
The device uses adaptive line-conditioning software to automatically adjust signal parameters whenever system configurations change. It connects to optical modules that support the XAUI interface, like XENPAK and XPAK. The system-side connection is done via an XGMII HSTL interface at 1.5 V. Just recently, Mysticom demonstrated the MY3004 in operation on two serially connected FR4 copper backplanes of up to 70 in. long.
As 1GE and 10GE packet services are deployed in the MAN and data centers, network equipment manufacturers are seeking to provide carriers with switching equipment for layers 2, 3, and 4. Manufacturers must offer not only an economic solution for Ethernet bridging, VLAN, MPLS, and IP forwarding, but also traffic-management features that let the service providers fulfill their varied service agreements.
Sandburst Corporation's HiBeam chip set offers one solution to this tough problem. Figure 3 shows a line card using this chip set. The FE-1000 forwarding engine uses proprietary address lookup and classifications algorithms to store forwarding tables and Cisco-compatible access control lists in commodity SRAM. This re-duces system cost by eliminating the need for external content addressable memories (CAMs) or coprocessors. The chip is optimized for VPN packet processing. Sandburst delivers it and the microcode together as an off-the-shelf solution requiring no customer programming.
The QE-1000 queuing engine talks to the switch cards by way of 3.125-Gbit/s 8B/10B encoded serial links. The BME-1600 bandwidth management chip controls the switch-fabric chips.
A patent-pending bandwidth allocation algorithm provides fine-grained bandwidth management that can be adjusted in increments of 1 Mbit/s so service providers can provision systems that guarantee bandwidth on a per-subscriber basis and deliver differentiated QoS.
One last thing. 10GE also is being considered for use as a fast serial I/O bus to replace PCI in forthcoming high-performance server and PC designs. While the leading contender in this space is currently InfiniBand, Intel will no longer support it. Could it be that 10GE is not only faster but also cheaper and better?
With 10GE on its way to another Ethernet success, we can look forward to more of the same. The next speed limit of 100 Gbits/s is a huge bump along the Ethernet roadmap. But we can probably anticipate a 40-Gbit/s Ethernet in the near future that will draw upon the developments in the OC-768 (40 Gbits/s) Sonet chips and systems.