What’s going on inside the latest cameras has a lot to say about the state of the art in digital imagers. This report offers tear-down analyses of CMOS image sensors (CISs) in mobile phones and professional digital single lens reflex cameras manufactured by Canon, Micron, Omnivision, Sony, and Toshiba.
It’s particularly interesting to examine the cell-phone end of the spectrum. CMOS image sensors have become the image capture technology of choice for the cost-sensitive, high-volume application of mobile phones. Today, Nokia and Motorola sell more digital cameras annually than traditional digital camera manufacturers. Today’s camera phones can offer optical resolution from 1 to 3.2 Mpixels.
CMOS has all but totally eclipsed CCD technology for mass-market image sensing. The world’s leading IDMs and fabless firms have invested in the development of CMOS image sensors to replace CCD image sensors. This investment has dramatically reduced CMOS image sensor cost and size and significantly boosted performance. Competition for the sockets is fierce. Innovation happens as often as 10 to 12 times a year, with competitors leap-frogging each other’s new products to get the all-important design wins in upcoming handsets.
This article details a few of the important aspects of CIS design: process-independent linear voltage gain; the extension of dynamic range by double integration; and lowering current consumption in chopper–type comparators.
Process-independent linear voltage gain
Canon’s 704F 6-Mpixel CMOS image sensor illustrates an approach to process-independent linear voltage gain. The IC is built on a process with three metal layers and one poly layer. It incorporates the sensor array and the analog front end (AFE) in one die (the sample analyzed by Chipworks was taken from a Canon EOS DS6041 digital still camera).
Figure 1, which is a simplified schematic of the AFE in the 704F, illustrates the basic idea of the front end. Typically, a fixed transconductor is a differential amplifier linearized through resistor (RE) degeneration. In a bipolar differential amplifier, if the VBE voltages of the differential transistors are constant, then the differential input voltage Vi appears across the degenerative resistor (RE). Thus, the emitter currents flowing through the emitters of the differential pair are:
IE1 = IS + VI /RE
and IE2 = IS – VI /RE
where IS is the differential bias current.
Assuming that the degenerative resistor is much bigger than the emitter resistance (that is, that RE >> re), the differential output current is:
iO= VI /(2re + RE)
Because Gm = io/vi, the transconductance of the differential circuit is simply a fixed value of 1/RE:
Gm = 1/(2re + RE)
where re <<RE.
Recall that re depends on the transistor emitter current IE, and that IE can’t be too small if re is to be negligible in comparison with RE. If this requirement isn’t met, the varying VBE voltage will result in the output current being a significant nonlinear function of the input voltage.
To solve the problem, single-stage amplifiers can be added on the input of the differential pair to bypass the effects of the V\[subscript]BE\[/sub] voltage and force the emitter voltages to be equal to those of the differential input voltage V\[subscript]I\[/sub]. This assures that:
GM = iO/VI = 1/RE
In its CIS 704F, 704W, and 706P series of CIS ICs, Canon combines two linear fixed-transconductors to perform correlated double-sampling (CDS) in the AFE. The first fixed transconductor, shown on the left side of the schematic in Figure 1, in the blue highlighted area, consists of the differential pair (224 and 225), programmable degenerative resistor RE1, current bias (232 and 235) and active load (236 – 239).