DESIGN VIEW is the summary of the complete DESIGN SOLUTION contributed article, which begins on Page 2.
When it comes to interconnect in gigabit-speed communications equipment, engineers are discovering that what's good for the network is also good for the networking equipment. Over the last two decades, Ethernet has evolved from bus-based to switch-based. Now the device interconnect inside the networking gear is undergoing the same transformation.
The trend started with switch-backplane interconnects, and has now worked its way down to the board level. At this level, it presents a new way to resolve several critical issues in the design of equipment supporting enhanced services at high speed.
Up until the 1-Gbit generation of networking equipment, it was common to build I/O subsystems based on bus interconnects. At higher data rates, engineers adopted high-speed point-to-point protocols. The interconnect design resembled a "daisy chain" with separate ingress and egress paths. However, because today's networking equipment is routinely expected to provide wire-rate gigabit speeds and perform layer 3 through 7 operations, bus and daisy-chain architectures fall short.
One emerging solution is to implement a switched interconnect. This trend can be seen by the evolution of several popular bus standards to support switched interconnects. Standards bodies and promoters of HyperTransport, RapidIO, and PCI Express have positioned each of these to evolve to switched-bus designs.
The article delves into switched-network design, and points out potential pitfalls such as the effects of latency on transport and flow control. Also discussed are a couple of variations on switched design, specifically the role it plays in the new Advanced Telecom Computing Architecture (ATCA). An ATCA line-card design example drives the point home.
Full article begins on Page 2.