The fundamental circuit shown in Figure 1 generates timing for a two-phase stepper motor from an oscillator, as well as a direction (forward or reverse) signal. Figure 2 depicts the typical timing signals for a two-phase stepper motor.
A clock from a source (like a timer, PWM output, etc.) is input to a two-input XOR gate. Another input, F/_R, inverts the clock if it's at Logic 1. A flip-flop divides the pulse train output of the XOR gate by two to create CLK A. Dividing the inverted output of the XOR gate by two creates CLK B. CLK A will lead CLK B. However, when the F/_R signal goes low, CLK B will lead CLK A, reversing the motor's direction. Thus, the F/_R input can be used to control the direction of rotation. A level translator-buffer can be added after CLK A and CLK B to generate bipolar logic levels for driving the motor. The stepping rate is half the clock rate. The CLR input resets the circuit into a known state after power on. Figure 3 shows the circuit's logic timing.