Chip fuses assume two roles in electronics: protecting end users from injury, and preventing damage to circuitry. These functions benefit both the owner and the vendor of a given piece of equipment.
Over the last 10 years, market demand for electronic devices serving information technology, mobile, and consumer applications has risen dramatically. Alongside the rapidly increasing demand comes the greater risk of unexpected conditions in electronic devices. Other electronic devices mostly cause these conditions, creating hazards like electrical overloads that demand protection via overcurrent devices such as chip fuses.
CHIP FUSE DESIGN PRINCIPLES
Before analyzing the electrical properties of the various chip fuses on the market, it’s important first to understand the design principles underlying each technology.
Standard melting fuses may be based on a metal wire inside a capped ceramic or glass tube filled with air or sand. Chip fuses, on the other hand, employ completely different principles. Most chip fuses look like standard chip components and are built using either a single- layer or multilayer ceramic substrate. Some older designs are based on epoxy fiberglass substrates similar to printedcircuit boards (PCBs).
The fusing element on top of the single-layer or inside the multilayer substrate is based on a highly conductive material such as copper, gold, or an alloy like copper-tin (Cu-Sn) or silver-palladium. These composite materials can increase the fuse’s ability to withstand inrush current. However, they also tend to be less stable in their response to thermal stress, which heightens the possibility of incorrect opening after multiple inrush cycles.
Depending on the type of substrate, the fusing element may be a laser-trimmed thick-film deposit or a chemically etched metal layer to achieve the desired characteristic. Bonded gold wire may also be used. The shape and thickness are determined so the element will melt in a certain time under overload conditions, if the electrical current reaches a certain level.
To fulfill its role as the functional layer of the chip component, the fusing element must also be protected against environmental conditions. In the case of a singlelayer chip fuse, the element is usually covered with a lacquer or epoxy. The fusing elements of multilayer chip fuses tend to receive inherent protection from the substrate layers. Since chip fuses can be rated for currents up to the 7- to 8-A range, they need surface-mount device (SMD) contacts with low ohmic resistance.
The fusing characteristic is the most important property of a chip fuse (Fig. 1). This defines the melting times at certain levels of electrical overcurrents. If the current reaches a certain predetermined level, the electrical power dissipated within the fuse element is sufficient to melt and vaporize the element within a known duration called the pre-arc time.
KEY PERFORMANCE PARAMETERS
The fusing characteristic shown in Figure 1 has two main regions. The first region, to the left of the blue curve, includes normal “transparent” operation within the green-shaded area as well as short overcurrent conditions up to twice the rated current of the fuse. This region defines the pulse-load capability of the chip fuse, and it depends on the properties of the fuse element. For example, a high pulse-load capability can be achieved by increasing its cross section.
The blue line defines the melting times for overload and short-circuit currents above the rated current of the fuse (IR), which is 5 A for the fuse illustrated. The energy required to melt the fuse is governed by I2T. So as the value of the overcurrent rises, the opening time for the fuse becomes shorter.
Typically, the fuse is expected to open within one to three seconds when it’s exposed to twice its rated current. At 10 times the rated current, it should open in less than 0.1 ms. From the opposite point of view, to prevent the fuse opening when it’s exposed to a normal inrush current, the maximum I2T of the inrush pulse should be approximately less than 50% of the maximum rated I2T for the fuse. The melting time of the fuse is related to the thermal resistance between the fuse element and the environment, which depends on the characteristics of the fuse element, substrate, sealing, and terminations, as well as the layout of the PCB. As a result, the opening time, and therefore the effectiveness of the protection that’s provided, depends both on the production technology and the product’s design.
If the thermal resistance between the fuse element and the environment is too low, there will be insufficient energy to melt the fuse element. This will prevent the fuse from cutting off overload currents equivalent to double the rated current below 120 seconds. Figure 2 and Figure 3 illustrate this case for multilayer chip fuses as well as for laser-trimmed thickfilm chip fuses.
In practice, however, the accuracy, repeatability, and stability of the fusing characteristic depend strongly on the design of the fusing element and the production technology used. Understanding the influence of these two factors holds the key to selecting the optimum chip fuse for a given application.
The stability of the fusing characteristic is closely linked to the component design. Repeatability, on the other hand, depends mostly on the stability and precision of the chip fuse production technology.
STABILITY
What does “stability” mean with respect to the fusing characteristic? The electrical resistance of the chip fuse is the parameter that determines its fusing properties. Due to the fact that the applied energy under overload conditions is proportional to the resistance value, a fuse will melt more quickly with increasing resistance. Conversely, reducing the resistance will produce a slower melting time.
Experience with thick-film resistors has shown that thermal stresses such as short-time overloads, soldering heat, and pulse stresses tend to produce a positive drift in electrical resistance. These phenomena occurring in a chip fuse will therefore change its characteristic, resulting in shorter melting times.
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