If you're looking for a challenge, try interconnecting
microelectromechanical-systems (MEMS) ICs with conventional ICs and other MEMS ICs. If you've mastered
that skill, move to the front of the line, because MEMS
technology involves a high level of integration between
many dissimilar functions.
Generally, it's about integrating electronic with
mechanical functions. So what's considered the ultimate goal of such a process? It's a seamless integration
of the MEMS structure onto the same CMOS chip as the
circuitry with which it will interface.
Today's MEMS ICs may combine electrical and
mechanical functions. In some cases, they include optical signals. Known as micro-optoelectromechanical systems (MOEMS), these devices use micromirrors to direct
signals in high-definition TVs and, one day, may direct signals on the Internet. Another technology, silicon
microchannels (microfluidics), will process gases, liquids,
and nano-particles on lab-on-a-chip devices that will drive
major medical breakthroughs.
Some conventional ICs now use through-silicon vias
(TSVs) to interconnect chips into thinner 3D structures.
Manufacturers are now developing processes that will open
the door to TSVs with diameters ranging from 30 to 50 mm
on 50-mm thin wafers with 300-mm diameters. Someday,
TSVs also may be applied to MEMS interconnects.
A MATTER OF BASICS
Because a MEMS IC must
reside in a cavity or other unrestricted space for free
mechanical motion, it can't be packaged through conventional means. The chip must be capped or epoxy overmolded, though conventional over-molding isn't viable
since the MEMS structure can't be "locked" in place.
Moreover, the MEMS IC must be protected from contamination common to IC techniques. Residue from die sawing and the high-temperature effects of standard IC
processes can be lethal for MEMS ICs.
Also, a MEMS IC can't offer any functionality on its own.
It must be hooked up with
additional electronic circuitry for signal processing and
other functions, as well as
processing circuitry, to
make it useful. That's
because a MEMS process
differs from standard IC
processes like CMOS. The
supporting circuitry in nearly all MEMS ICs requires
additional ICs, which leads
to many possible interconnect implementations (see
"MEMS Meets ASIC").
Due to the structural
nature of MEMS devices,
conventional polycrystalline silicon processing
can't be used to integrate a MEMS device with a conventional IC. Polysilicon IC processing requires
temperatures of 800°C and higher,
which would compromise and
destroy a MEMS structure. But low-temperature, back-of-the-line (BOL),
silicon-germanium (SiGe) processes
that can handle temperatures of
about 400°C to 450°C make it possible to integrate MEMS devices on
top of standard silicon-based electronics (see "Low-Temperature SiGe
Processing Advances MEMS Integration,").
The use of improved capping materials is becoming more popular, with
different techniques being employed
to interface the MEMS device to
another IC. Wafer- and device-level
packaging often are used for the
high-volume production of MEMS ICs,
where the chip is packaged prior to
the wafer-dicing step.
One method employs through vias
and pads on the outside of the cap.
In this case, engineers can use
wafer-level processing that permits
the sawing of both the cap material
and the MEMS chip simultaneously.
Such an approach yields a chip with
few wire-bond pads on it.
Another approach is to create
micro-vias and bring the MEMS pads
to the bottom, put a regular cap on
the MEMS chip with a little cavity, and
then bond the chip. Many firms
involved in 3D chip stacking are
developing through-via processes to
create silicon micro-vias. The microvias then are plated, which allows for
passive chip stacking.
This can be performed at the wafer level with hermetic sealing, eschewing any secondary packaging steps. In fact, it's possible to package an entire MEMS chip at the wafer level (). This is sometimes called zero-level packaging. Once the cap is in place,
the IC package can be handled using conventional IC processing. It can even be encapsulated by liquid dispensing
or transfer over-molding.
VTI Technologies' glass-silicon capping wafer technology provides a large number of feed-throughs with very low
parasitic capacitance, high isolation resistance, and reasonably low contact resistance. Silicon areas extend
through a glass wafer from the contact areas on the top
down to electrodes on the bottom. The bottom makes
ohmic contact with the MEMS structure or acts as a planar electrode for vertical sensing or excitation. The top
surface metallization also can be used for interconnection between feed-throughs and
for rerouting.
Hermeticity is an important
parameter when choosing the
material to cap the MEMS IC's cavity. For high-level hermeticity, the
cavity can use a transfer-molded
capping material as well as a low-temperature co-fired ceramic
(LTCC) package. But high-level hermeticity entails costs for many
MEMS IC applications, such as
consumer electronics.