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Simple PWM Signal Generator Suits Backlight LCD Applications

By Yushan Li

April 15, 2002

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In LCD backlight applications, a dc-to-ac inverter drives cold-cathode fluorescent lamps. The inverter's input comes from the display's power supply. Currently, it spans from 12 to 18 V. Pulse-width modulation (PWM) dimming, or digital dimming, can achieve a wider dimming range (e.g.,100:1) than the conventional analog dimming range (about 3:1).

Dimming level, or light output intensity, is controlled by a dc voltage from the display microcontroller's digital-to-analog converter (DAC). Converting this dc voltage to a low-frequency (e.g., 170 Hz) PWM signal (fixed-frequency, variable-duty-cycle square-wave) requires a PWM signal generator. But if the inverter controller doesn't include this PWM signal generator feature, an external generator is needed. Another design challenge is generating a jitter-free PWM signal in the presence of nearby power-circuit coupling and supply variation, which can be 10%.

A simple way to implement the PWM function is shown in the figure. The dc input for the circuit, VDIM, controls the light intensity. The circuit's output is the PWM signal used by the backlight inverter to achieve digital dimming. VCC is the inverter input (e.g., 12 V), and is also used as the supply for the PWM signal generator.

The schematic shows an LM1458 dual op amp from National Semiconductor, but many other generic op amps may be used as alternatives. The op amps are used for signal comparison instead of actual comparators for several reasons. First, the op amps provide a low output impedance for driving the low-pass filter (R5 and C4). Also, the PWM signal is low frequency (about 170 Hz). Finally, no output pullup resistors are required.

The first op amp forms an oscillator for generating a triangle-like waveform at pin 2 of U1A. Its level is 3.6 to 5.8 V p-p with the component values shown. Oscillation is achieved by positive feedback through R3. Primarily, R4 and C1 determine the frequency.

The second op amp generates the PWM signal by comparing the dc input, VDIM, with the triangle-like waveform at pin 5 of U1B. Resistor R6, C3, and the 9.1-V zener diode generate a stable supply voltage, even though VCC may vary 10% or more. R5 and C4 form a low-pass filter to get rid of high-frequency coupling noise from the nearby switching power circuit (e.g., 60 kHz).

Capacitors C2 and C3 also help filter out the high-frequency noise. This filtering is essential to achieve a jitter-free PWM signal. Otherwise, the display may flicker, especially at low-brightness levels.

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