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Dual Core Cortex-A9 With ECC Finds FPGA Home
Date Posted: October 12, 2011 11:58 AM
Altera has announced its 28nm Cyclone V and Arria V FPGA lines (Fig. 1) that will support dual core Arm MPCore Cortex-A9 processors. The hard core processors are surrounded by a set of typical microcontroller periherals in addition to high speed connections to the FPGA fabric. Altera is not the first to include ARM cores in an FPGA and most can incorporate soft core Arm processors. One feature that most solutions lack is ECC (error correcting code) that provides single bit error recovery. This is key to applications such as avionics and medical were hardware like this matters.
Altera includes a single hard core ECC memory controller with each dual core processing complex in addtion to a shared 512 Kbyte L2 cahce. Additional soft core memory controllers can be defined within the FPGA fabric to provide a higher memory performance for applications that require it. The QSPI (quad serial peripheral interface) support can also handle ECC. The system supports various boot modes including booting from QSPI.
Hard core Arm processors can be found in Microsemi's SmartFusion (see FPGA Combines Hard-Core Cortex-M3 And Analog Peripherals) that incorporates a hard core ARM Cortex-M3. The Cortex-M3 is found in a wide range of microcontrollers. Xilinx's Zynq-7000 EPP
(see FPGA Packs In Dual Cortex-A9 Micro) includes dual Cortex-A9's like Altera's new architecture. Dual core Cortex-A9 chips are finding homes in tablets and smartphones.
Altera has also partnered with Intel to bring the Atom to Altera FPGAs (see Configurable Platform Blends FPGA With Atom). The difference with the E600C from Intel is that the Atom and Altera FPGA are separate chips combined on a multichip carrier. The two are linked via a pair of x1 PCI Express links via the multichip carrier. This is functionally similar to the Cortex-A9 approach but the new chips are true single chip solutions.
Altera's FPGAs can boot the micro or FPGA only and the processors can reprogram the FPGA fabric. The complement of peripherals includes a pair of gigabit Ethernet interfaces, two USB 2.0 OTG ports plus the usual timer and serial ports like SPI and I2C. The higher end Arria has a 125+ Gbit/s interconnect. The 250 MHz 256 bits full duplex channel is compatible with AMBA AXI 3 interface and it also supports Altera's Avalon bus. The system supports cache coherent hardware accelerators.
Altera | ARM | Arria | Cortex-A9 | Cyclone | ECC | Microsemi | SmartFusion | Xilinx | Zynq