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Avoid The Bird Flu With Proper FPGA Migration

Prepare in advance for FPGA-to-ASIC migration, or you may wind up flying in the wrong direction.

Date Posted: August 02, 2007 12:00 AM
Author: Daniel Harris

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Many companies and online resources are available to aid in the migration process, or actually do it for you. When working with a third party, be sure to get in explicit writing what will be included as part of the overall NRE, as well as any potential "gotchas."

A statement of work quote may include 95% fault coverage, so find out how much it will cost to increase the fault coverage later if you require that flexibility. Also, after the third party reviews your project, be sure to find out what functionality will be difficult to migrate (like phase-lock and delay-lock loop elements) and what could cause project delays.

Find out the "rules of engagement" to understand what will be expected of you and when. And, have a dedicated person who is willing and able to resolve issues quickly. Third-party companies will typically take what they can get with respect to constraint, pinout, and report files.

Synplicity's Certify helps in the multiple FPGA-to-ASIC conversion process. The main benefit of using Certify is its RTL partitioning capability, known as Quick Partitioning Technology (QPT). QPT is an automated partitioning tool that targets both experienced practitioners and rookies. Synplicity also offers Identify Pro, which provides a connection between FPGA prototypes and simulation software for analyzing and debugging RTL.

In addition, Synplicity recently acquired Swedish company Hardi, which sells ASIC prototyping mother/daughterboards that can be connected like Legos to meet functionality needs. The company wrote up a nice white paper on using multiple FPGAs to prototype a complex ASIC: "ASIC Prototyping Using Off-the-Shelf FPGA Boards: How to Save Months of Verification Time and Tens of Thousands of Dollars."

The Dini Group, a California-based company, sells ASIC prototyping boards capable of emulating up to 24 million ASIC gates. Meanwhile, ChipX offers migration services capable of converting FPGA RTL code or netlists to structured ASICs, embedded arrays, and standard-cell ASICs. Also, eASIC Corp. offers migration to its structured ASIC devices as well.

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