Carefully Weigh The Tradeoffs Of Cell-Based Vs. Structured ASICs

After a thorough investigation, the design team concluded that none of its implementation options offered advantages in all aspects of the design. The 90-nm, cell-based option presented the highest performance and lowest-power implementation. It also offered the lowest unit cost at high volume.

But high NRE costs, an extensive investment in development tools and design expertise, and a longer development cycle offset those advantages. The move to a more mature 130-nm process would reduce some of those high up-front costs. But the designers would need to scale down their performance expectations and still face a long and complex development cycle.

Given the project’s aggressive development schedule and the team’s limited resources, the 90-nm structured ASIC option offered the optimal strategy. By using a state-of-the-art 90-nm process, the designers could meet their performance goals. At the same time, the fixed power and clock nets in the structured ASIC architecture, along with the availability of architecture-optimized tools, would simplify the design flow, minimize design respins, and significantly shorten TAT.

The structured ASIC’s lower up-front investment was a key advantage. Ultimately, however, the technology’s shorter development cycle and the ability it gave the team to bring the product to market faster were the deciding factors. In the end, the team agreed that the right way to deliver an accelerator is on an accelerated schedule.