Think of it as silicon Silly Putty. University of Wisconsin at Madison researchers have demonstrated a way to release, strain, and move thin membranes of semiconductors from a conventional flat substrate to a new contoured surface.
The discovery promises to lead to semiconductors and circuits that are designed to run faster, accommodate the increasingly constrained form factors of next-generation mobile devices, and allow the development of new types of flexible electronic products.
The freed membranes—just tens of nanometers thick—retain all of the properties of regular wafer-based semiconductors, yet they're flexible enough to be bent and twisted into shapes ranging from curves to tubes. "We're no longer held hostage to a rigid rock of material," says Mark Eriksson, an associate physics professor and, along with engineering professor Max Lagally, the project's co-principal investigator.
Novel shapes aside, the technique could make it easier and cheaper to create faster semiconductors. Current flows faster in silicon that's been stretched, a property that's already widely exploited by chip manufacturers to help control conductivity and create speedier devices.
Yet to stretch silicon that's based on conventional substrates, manufacturers
must painstakingly build multiple silicongermanium (SiGe) layers that form natural
breaks in the crystal lattice—a time-consuming and costly process. "You
also risk scattering electrons and degrading performance," says Eriksson.
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The new approach aims to make silicon stretching almost as easy as pulling pizza
dough. For their demonstration, the researchers created a three-layer nanomembrane
consisting of a thin SiGe layer sandwiched between two similarly thin silicon
layers.
The completed nano-membrane then sat on top of a silicon-dioxide layer in a
silicon-on-insulator (SoI) substrate. To release the nano-membrane, the researchers
etched away the oxide layer with hydrofluoric acid (see
the figure).
Freeing the membrane from the hard SoI substrate allowed the SiGe layer to expand and take the silicon along with it. The silicon's tensile-strain can be easily adjusted by the researchers simply by varying the layers' thickness. The team has dubbed the technique "elastic strain sharing," because the strain is balanced between the three layers. "The result is no defects," says Eriksson.
Eriksson admits that much work remains to be done before the approach can be
used in real-world semiconductor manufacturing. The biggest challenge facing
the researchers is scalability, says Eriksson. So far, the team has only managed
to build nano-membranes measuring 0.5 by 0.5 cm. Cost-effective production would
require a technology that more closely resembles a standard wafer size.
The researchers would also like to find a better, more efficient way of freeing the nano-membranes from the SoI substrate. The current process requires releasing the nano-membranes into a solution before bonding them to other materials. The team would like to find a more direct way to move the nanomembranes between surfaces.
Eriksson is optimistic that the hurdles can be surmounted. "What we've done is an initial demonstration," he says. "Now that we've shown that the underlying principles are sound, we can begin taking the next steps."
University of Wisconsin, Madison
www.wisc.edu