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FPGAs Pushing MCUs As The Platform Of Choice

Tools and core selection make it easier to build systems-on-a-chip with FPGAs.

By William Wong

June 26, 2008

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Falling FPGA prices and ever-improving tools make FPGA development more palatable to designers who aren’t well versed in this arena. Likewise, the increased number of choices and improved sophistication of soft processor cores for FPGAs create new options for developers who would otherwise look only at stock, offthe- shelf microcontrollers.

There are many reasons why designers should consider FPGAs as a development and deployment platform. Processors come and go, but more intellectual property (IP) developed for FPGAs can be migrated to newer chips. It’s even possible to move between vendors, though developers often take advantage of features that may be unique to a particular chip. Many companies use FPGAs to deliver pin-compatible FPGAs for legacy microcontrollers.

That’s why FPGAs are often the ideal path to take when developing new systems. They can employ a collection of standard peripherals around a standard processor core, such as the venerable 8051 in addition to custom IP. Even multicore solutions are easy to build, though they tend to be cooperative cores rather than symmetrical-multiprocessing (SMP) systems. Applications that require SMP are better addressed by standard multicore processor chips such as those from AMD and Intel.

Software developers favor standard cores, especially those that match existing microcontrollers. Such matches allow common development tools to be used, which can be more critical to success than the optimum performance provided by a custom processor architecture.

Still, enhancing a standard core by adding a few registers or instructions often delivers an interface to custom IP that significantly improves performance, reduces power consumption, and makes many applications practical.

Designing an FPGA system-on-a-chip (SoC) with standard component peripherals is relatively simple. For example, the ARM Cortex-M1 core is easy to incorporate in Actel’s Libero integrated development environment (IDE) schematic layout (Fig. 1). The ARM Cortex-M1 is specifically designed for FPGAs. It supports the full ARM Cortex instruction set.

FPGA vendors have their own schematic design tools. Lattice Semiconductor’s ipsLever handles the company’s FPGAs and complex programmable logic devices (CPLDs). The first step of the development process is complete upon creation of the initial system design. The next step is to move the design onto the FPGA and then write software. Given the flexibility and range of chip options, this can be a significant task. However, it may be easier than you think.

KITS KEEP CODERS CODING
FPGA development kits that target developers who prefer hard or soft processor cores are very common. While most FPGA kits can handle one or more cores, they’re specifically designed to get programmers up and running with a minimum of fuss.

Most FPGA development tools will generate the corresponding header and source code files needed for software development based on the system design. Some extend the task further so that downloading applications to the FPGA’s memory is part of the development process.

Many FPGA development environments use their own IDE with a separate IDE for software development. The separate IDE often is based on the open-source Eclipse IDE with C/C++ development tools (CDTs). There’s some movement toward using Eclipse as the platform for other FPGA development tools.

Altera’s Nios II Embedded Evaluation Kit, Cyclone III Edition, illustrates the trend of providing kits that resemble kits designed for conventional microprocessors (Fig. 2). The LCD screen and removable flash memory are combined with the Cyclone III FPGA to deliver a software platform that can be easily customized using Altera’s Quartus II and SOPC Builder.

The Nios II IDE provides software development support for the 32-bit Nios II soft core. For demo purposes, developers can simply write applications for the Nios II and then run them from the flash memory in an afternoon. Of course, developers can opt to completely redesign the FPGA’s contents.

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