DESIGN VIEW is the summary of the complete DESIGN SOLUTION contributed article, which begins on Page 2.
With wireless transmission standards evolving from 2G to 2.5G to 3G and beyond, each wireless infrastructure network subsystem is under pressure to handle increasing performance and bandwidth requirements. At the same time, subsystem chip vendors trying to supply the necessary functionality and performance are facing technological limitations. As a result, system architectures have to be rede-signed with nontraditional components. Multiport memories, also known as specialty memories, fall into this component category.
As wireless networks transform themselves to carry multimedia traffic at 3G rates, the complexity of processing requirements inside a baseband card has increased tremendously. A large number of DSPs, FPGAs, and ASICs are used to partition the tasks, process the data in parallel, and share it in real time. Employing multiport memories with large buffering capacity enables such interprocessor communication.
Multiport memories improve the system's overall performance by increasing overall throughput, adding design flexibility, and enabling faster time-to-market. Board design also improves, since these memories shorten the distance that signals must travel between DSPs and FPGAs. Moreover, point-to-point connections reduce the load on interfacing DSPs, FPGAs, and ASICs.
This article focuses on one of the main components of a 3G basestation—the baseband-processing card. This is where the most intensive computation and signal processing takes place. In particular, the article concentrates on the card's receive flow. See the figure below, which highlights the card's receive section.
Also discussed are techniques for achieving efficient chip-rate and symbol-rate processing.
Full article begins on Page 2