Digital technology saw some
significant leaps this year
as companies responded to
the limits of Moore’s Law
and the need for better
power conservation.
NEW TRANSISTORS
For more than
40 years, “traditional” transistors have
been built using a combination of polysilicon-
gate electrodes and silicon-dioxide
(SiO2) dielectric insulators because
of the materials’ manufacturability and
ability to deliver continued transistor
performance improvements.
Yet with Moore’s Law threatening to
expire as silicon performance reaches its
physical limitations, companies like Intel
and IBM have introduced hafnium-gate
dielectric insulators and new non-disclosed
metal materials for the NMOS
and PMOS transistors that make up
CMOS semiconductors (Fig. 1).
Intel is leading this change with the first
working 45-nm multicore processors
using these technologies. The company
claims that “these new materials, along
with the right process recipe, reduce gate
leakage more than 100-fold while delivering
record transistor performance.”
On Nov. 12, Intel launched the Penryn
family of multicore processors, which
will run Windows Vista, Mac OS X, and
Linux operating systems. The Penryn
architecture will be used to build 35 new
models of CPUs for both
servers and high-end PCs.
IP STOPS THE LEAK
Not all companies can afford
to partner with the likes of
IBM to access new hafniumbased
process technology.
Therefore, companies like
Mosaid Technologies offer a
cheaper alternative. Mosaid’s
Mobilize IP platform
addresses key leakage issues
at 90 nm and below without
requiring changes to the silicon
process.
The new IP manages leakage issues by
providing both static and active power
management in the form of a configurable
standard-cell library (Fig. 2). The
library is used to form voltage- and frequency-
scalable power islands.
An automated hardware- or softwarecontrolled
power-island manager (PIM)
administers all power-island sequencing
of active and sleep phases over process,
voltage, and temperature. This eases the
instantiation of power islands while
reducing leakage over 100-fold. It also
can be used in conjunction with 1-V and
0.8-V supplies. And, it can transition to
and from sleep mode in a mere 50 ns.
LOW-POWER A/V
High-performance
mobile audio/video (A/V) chips
often deliver superior processing at the
cost of higher power–and lower power
means less processing muscle. The
SVENm (Scalable Video ENgine) from
On Demand Microelectronics, though,
has changed that paradigm.
Using as little as 80 mW for SD decode
and 300 mW for encode, this chip can
handle today’s compute-intensive video
standards, like H.264, MPEG-4, and
VC-1. The SVENm targets mobile applications
that require video formats up to
D1 (720-by-576 PAL or 720-by-480
NTSC) resolution. It also excels where
most processors fail by delivering the
ability to handle future video standards
via software programmability.
The individual functional blocks are
programmable using C and integrated
development tools. The SVENm’s
processor architecture was built based on
an in-depth analysis of video-processing
algorithms, yielding an optimized
processor architecture. The architecture
exploits parallelism to process video,
resulting in increased efficiency.
This feature set makes the SVENm
optimal for use in smart phones and
portable media devices, enabling designers
to add drop-in video capability to
their next-generation MP3 players. Other
features include simultaneous video
encoding and dual-stream decoding,
audio processing, and high-performance
image processing.