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Phase-Change Technology Enters The Memory Market

Date Posted: October 01, 2009 12:00 AM
Author: Ed Doller

With any nonvolatile floating-gate memory device, the more we cycle the device, the more failures we tend to observe, and the less data retention we get. What is interesting about PCM is that retention is decoupled from endurance. This means that if we cycle a PCM memory device a million times or just one time, the data retention will be identical.

That characteristic requires a fundamental change in how we think about using and managing the technology. Data retention is clearly a critical requirement in many demanding applications. At Numonyx, we have demonstrated 10-year data retention in PCM devices.

We have observed another phenomenon that makes it easier to use PCM in system-level designs. When we see a failure, it always occurs during a write. So if we are writing data to the device and a write-verify shows that the data is not there, the data can be immediately written again to another location. Because of the exceptional reliability attributes of PCM, we will see this technology adopted first in applications with the most critical requirements.

LOW-POWER MEMORY FOR WIRELESS
We are in the process of bringing up a new generation of smart-phone users who demand three essential qualities: instanton, ease of use with long battery life, and great performance with multimedia, games, and Internet computing applications.

PCM’s excellent read latency means it can execute code with the performance that the wireless generation demands. It also enables the storage of large amounts of code and data in memory, with the ability to sustain millions of read-write cycles. And we should not forget that PCM is nonvolatile memory technology, so it can simplify power management in wireless devices while helping to eliminate nagging performance/battery-life tradeoffs. Microprocessor cores with LPDDR2 memory controllers will enable system designers to benefit from the low power of PCM, using a single nonvolatile memory device to simplify cell-phone architecture.

PCM AND PERFORMANCE
We can use memory technology to improve computing performance in two basic ways: by adding bandwidth to move more data, and by reducing latency to move the data faster. In high-end applications where performance is most critical, adding to bandwidth involves adding more RAM, hard drives, and servers.

To achieve latency improvements we can replace hard drives, which work in milliseconds, with SSDs, which respond in microseconds. This approach tends to improve total cost of ownership, because it is more costeffective to add a single low-latency server than to add three or four servers.

When we compare write latency, PCM, at about 1 µs, is typically about 100 times faster than SLC NAND flash and approximately 100,000 times faster than a hard disk. The same advantages hold true when we look at read latency. At 50 to 100 ns, PCM is about 100 times faster than SLC NAND and about 100,000 times faster than a hard disk.

The fundamental value of a technology will determine the price users are willing to pay for it. In the world of e-commerce, even modest improvements in latency can be extremely valuable. According to Amazon, every 100 ms of added latency can cost 1% in sales. According to Google, an extra 500 ms in search page generation time can drop traffic by 20%. And, the analyst firm Tabb Group reports that a broker could lose $4 million per millisecond if its electronic trading platform is just 5 ms behind the competition.

Is there value in putting PCM into a system between RAM and SSD? I think so, because placing low-latency PCM technology in high-end systems can deliver incredible performance gains. We are now working with customers to implement PCM solutions that deliver value by supplementing other memory technologies within server systems.

nonvolatile memory | PCM | phase-change memory
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