In high-speed digital signal-processing systems, designers must keep pace with the rising speeds of continuously incoming signals, while simultaneously achieving excellent filter performance in terms of flatness across the bin (data point), and rapid cutoff. Up until now, the choice has been between a programmable DSP approach with a fast fourier transform (FFT) algorithm, and hardware devices (FPGAs or ASICs) with an FFT or pipelined FFT.
A new, special-purpose piece of hardware IP called Pipelined Frequency Transform (PFT) has been developed and patented by the British company RF Engines Ltd. (RFEL). Using the PFT, designers now achieve a totally new quality of real-time data in frequency transformations with significantly less hardware than by using DSPs running FFTs. The PFT acts as a multiple stack of digital frequency converters and provides conversion and filtering of channels across a spectrum bandwidth of up to 100 MHz. This function is carried out in real time at the analog-to-digital-converter (ADC) clock rate with all channels available for onward processing.
By employing a PFT, it's possible to process the information of an ADC running at over a 200-MHz sampling rate, in real time without losing data, while providing multiple individual channel outputs at baseband (complex I and Q channels). The PFT can be considered as the exact equivalent of a massive bank of finite-impulse-response (FIR) filters and frequency converters.
The PFT core is applicable wherever FFTs, digital downconversion, or multiple FIR filters are used, and where a wideband spectrum must be channelized and the cost of individual frequency converters would be prohibitive. Another use is as a replacement for the traditional FFT, where the PFT provides significantly improved frequency "bin" selectivity and flatness, as well as real-time pipelined processing. Where requirements for a large number of channels and good filter performance exist, techniques like the FFT become uneconomical, and the PFT provides the optimum solution.
The PFT can be supplied as firm or hard IP, depending on the application and performance requirements. The PFT core will be parameterized to enable fine-frequency tuning of the hardware design for specific applications. This will let the designer focus the PFT's performance on specific center frequencies and resolution bandwidths defined within the spectrum, and save even further silicon by not processing unwanted channels. Designers will also be able to define the final filter performance for specific applications.
Key areas for the PFT's use include broad-bandwidth applications of up to 100 MHz, such as next-generation mobile phone basestations, spectrum analyzers, radar, and electronic surveillance equipment. All require conversion and filtering of channels (from a few to thousands) in real time, with all channel signals available for onward processing.
The PFT core has proven invaluable in a number of ongoing applications. In one project, there was a need to continuously monitor an entire 80-MHz band with under 100-kHz resolution, an update rate of over 200 kHz, a 75-dB dynamic range, and across-the-bin ripple of under 0.1 dB. All hardware for this was achieved in a PFT-based approach that implemented just one Xilinx XCV3200E Virtex-E 32-Mgate 35- by 35-mm FPGA.