When peering through the front passenger window of the latest model cars, you've
got to wonder if you're staring at the dashboard or some conceptual, high-end
home-entertainment center. Now, as the clamor grows to enrich the infotainment
element even further, efforts are being expedited to process, manage, and seamlessly
connect cars to specialized information and services. These range from GPS satellite
navigation to entertainment, roadside assistance, real-time traffic updates, and
stolen-car tracking.
What does all of this content mean? It means a greater penetration of electronics
devices into the car, whether it's field-programmable gate arrays (FPGAs), memories,
DSPs, graphics engines, microcontrollers, communications processors, or, probably,
all of the above. Roughly 10% of cars sold in 2004 worldwide had rear-seat entertainment
(mostly high-end models), but many automotive experts believe that figure will
climb to 25% by 2010.
According to semiconductor IC market research firm IC Insights, a car's electronic
content will constitute 40% of the price by 2010, up from 23% in 2004. Although
presently small compared to the overall market, Philips believes the semiconductor
IC market for automotive infotainment systems will nearly double by 2010 (from
2004) as car infotainment systems continue to grow (Fig.
1).
With such a wealth of infotainment content invading the car comes the challenge
of designing these systems. The most important obstacle will be managing the
massive volume of information with the most cost-effective networking and computational
designs. Another hurdle involves the power supply. Tapping into an existing
power system that wasn't designed to handle additional electronics complicates
the loading factor on the car's power plant and calls for innovative power-supply
delivery and management.
COMPUTATIONAL POWER
Each infotainment feature added to a car requires more CPUs and processor boards
to handle real-time audio and video signals. Not surprisingly, numerous power
processor chips have come on the market as a result.
Freescale Semiconductor claims its MPC5200B offers the most powerful telematics
and infotainment processing power available, with its 885-MIPS rating. The chip
can handle audio compression, encoding and decoding, video decoding, audio jukebox,
and next-generation 3D navigation systems needs. According to the company, it's
the first single-core processor specifically designed for automotive applications.
Many automotive processors use a dual-core approach, preferring a programmable
DSP that handles changing automotive infotainment needs and a control processor
dedicated to control tasks. Introduced last year, Texas Instruments' OMAP processor
is a dual-core unit with a TI DSP as its core. Designed for feature-rich automotive
infotainment systems, it handles media and hard-disk-drive functions.
The OMAP integrates Standard Microsystems' MediaLB interface for the Media
Oriented Systems Transport (MOST) bus. Its efficient digital audio routing engine
provides up to six I2S digital audio ports.
Analog Devices' Blackfin is another two-core chip (both DSPs) for the automotive
sector. One DSP handles the signal-processing functions, and the other manages
the control functions. This approach gives OEMs a software-based solution to
quickly handle changing in-vehicle infotainment needs.
NXP, formerly a division of Philips, believes it has the most highly integrated
media processor for automotive infotainment systems. Its Nexpreria PNX9520 offers
more functionality through software for feature-rich vibrant media technologies
in the car.
Yet it may become prohibitively costly to add all of the required computational
power for future infotainment systems. Karputer Ltd. believes it has an answer
with its in-car Windows-based PC platform.
SHORTER DESIGN CYCLES
One major challenge facing OEM suppliers is reconciling shorter IC design cycles
with car manufacturers' much longer design cycles. (A typical car takes three
to six years from planning to production.) IC suppliers typically can go through
two or three design cycles before one iteration of a car's design cycle is completed.
Many of these IC suppliers are well aware of their negative experiences with
the telematics market, which never reached its full market potential and was
hardly a boom—except for General Motors' OnStar system. Nevertheless,
IC and subsystem suppliers have every intention of moving into the automotive
infotainment space, albeit more carefully and cautiously.
One way to deal with these challenges is to use FPGAs for automotive infotainment-system
designs. Flash memories and FPGAs represent a significant portion of the electronics
ICs used in automotive infotainment systems. They give designers the flexibility
they need to adjust to future in-car electronics needs at minimal cost.
With flash memory, memory densities up to 2 Gbits are available in a small
form factor. Using FPGAs allows for shorter design cycles and lower production
costs. For example, Xilinx and Xylon are collaborating on a multimedia platform
using FPGAs from Xilinx and logic IP core blocks from Xylon. The companies say
the platform will suit automotive and consumer applications (Fig.
2).
THE NETWORKING CHALLENGE
Another tough issue for designers involves networking the car of the future.
The MOST network, which uses plastic optical fiber (POF), is now being deployed
by many automotive electronics companies. Introduced first on the 7 series of
BMW cars in 2001, it's now the de facto standard for infotainment systems and
is used in many European car models (e.g., BMW, Mercedes-Benz, Porsche, and
Audi) (Fig. 3).
"MOST acts as the infrastructure for automotive devices to communicate with
each other," says Henry Muyshondt, senior director of business development at
SMSC.
It operates at 150 Mbits/s and separately from other more deterministic car
bus networks used for command and control, such as the controller-area network
(CAN) and the local interconnect network (LIN).
Separating the MOST bus from the CAN and LIN buses may seem reasonable. You
don't want a car's brake or steering mechanism to fail due to a radio shutting
off or going on. Still, MOST will be taxed to handle future infotainment system
needs. It might become more desirable if MOST shares up-to-date traffic information
with the CAN and LIN networks. Electronic gateways that bridge all three buses
are already being built for just this reason.
A synchronous network, MOST uses a timing master that supplies the clock. All
other devices on the network synchronize their operation to that clock. This
eliminates the need for buffering and sample-rate conversion, which makes it
possible to connect very simple and low-cost devices.
MOST also handles asynchronous packed-based data thanks to an efficient mechanism.
A control channel lets devices send control messages while the data channels
are all in use. Therefore, every device can cleanly start up and shut down the
data it's using (Fig. 4).
A key feature of MOST is its intelligent network interface controller (INIC).
"Initially, for real-time applications, an NIC had to be reprogrammed to satisfy
each new application. The INIC now does this automatically," says SMSC's Muyshondt.
SMSC supplies the MOST50 INIC, the OS81082. The chip features a MediaLB interface
that provides simple access to the MOST bus.