It's important to understand what the XPRES compiler doesn't do. It won't replace an experienced system architect and make decisions to automatically add designer-defined ports or queues. If the designer adds ports, the compiler will account for them and create instructions to use them. It won't try to tackle system partitioning, nor will it find all of the algorithmic tricks that a TIE expert might come up with. However, it will quickly perform all of the obvious optimizations, leaving the designer with more time to apply his expertise to the few remaining hot spots.
What kind of acceleration can a designer expect from the XPRES compiler? Depending on the function, designers will see a range of speedups (see the table). With a simple piece of code, such as a DSP-type kernel, which has less code and lots of latent parallelism, it achieves a 10.53 speedup. A larger function, such as an MPEG-4 encoder, is less amenable to acceleration but still gains a respectable threefold boost in speed. Basically, the smaller and "loopier" your C code is, the better XPRES will do in terms of acceleration.
Tensilica disclosed that the impressive scores (171.6 at 300 MHz) achieved by the Xtensa LX processor in "out-of-the-box" benchmarks run by the Embedded Microprocessor Benchmark Consortium came via use of XPRES compiler acceleration. In those benchmarks, Xtensa LX was shown to be 600% faster than the Xtensa V core and almost nine times faster than the ARM1020E processor.
The XPRES compiler is an add-on option for Xtensa LX processor customers costing $100,000 per year. It will be available in September.
Tensilica Inc.
www.tensilica.com
(408) 986-8000
It's important to understand what the XPRES compiler doesn't do. It won't replace an experienced system architect and make decisions to automatically add designer-defined ports or queues. If the designer adds ports, the compiler will account for them and create instructions to use them. It won't try to tackle system partitioning, nor will it find all of the algorithmic tricks that a TIE expert might come up with. However, it will quickly perform all of the obvious optimizations, leaving the designer with more time to apply his expertise to the few remaining hot spots.
What kind of acceleration can a designer expect from the XPRES compiler? Depending on the function, designers will see a range of speedups (see the table). With a simple piece of code, such as a DSP-type kernel, which has less code and lots of latent parallelism, it achieves a 10.53 speedup. A larger function, such as an MPEG-4 encoder, is less amenable to acceleration but still gains a respectable threefold boost in speed. Basically, the smaller and "loopier" your C code is, the better XPRES will do in terms of acceleration.
Tensilica disclosed that the impressive scores (171.6 at 300 MHz) achieved by the Xtensa LX processor in "out-of-the-box" benchmarks run by the Embedded Microprocessor Benchmark Consortium came via use of XPRES compiler acceleration. In those benchmarks, Xtensa LX was shown to be 600% faster than the Xtensa V core and almost nine times faster than the ARM1020E processor.
The XPRES compiler is an add-on option for Xtensa LX processor customers costing $100,000 per year. It will be available in September.
Tensilica Inc.
www.tensilica.com
(408) 986-8000